Senior Engineer I, Process Engineering

• Creative problem solver with experience in developing new films for emerging applications and experience in chemistry/materials characterization
• Works with semiconductor processing equipment to research, develop and optimize unit processes focused on the deposition of metal and dielectric films via PEALD
• Bringing innovative ideas, staying abreast of state-of-the-art processing applications in the semiconductor industry to be effective
• Process consulting and accountability including technical papers on advanced process applications and Intellectual Property creation
• Participates in and drives technical problem-solving sessions using the related scientific method and industry tools, such as Ishikawa diagrams
• Designs and conducts experiments, in addition to measuring and interpreting experimental output, aimed at fulfilling stated objectives using Design of Experiments (DOE) and Response Surface Methodology (RSM)
• Troubleshoots equipment problems and is personally and actively engaged in problem via “hands-on” modalities
• Works with customers and central marketing to understand and define requirements to successfully execute and document customer demonstrations
• Develops methods and techniques for integrating metal and/or oxide films into existing and future device technologies
• Ensures successful product transfer to customer base by performing demonstrations, training field service personnel, traveling to support remote sites (up to 10% travel required), and drafting documentation regarding process development, tool operation and maintenance
• Produces technical papers on process, equipment, and device integration improvement strategies and presents to professional audience

• PhD degree in Chemical Engineering, Materials Science, Electrical Engineering, or Physics
• Fresh PhD graduates OR MS degree holder with 2+ years of work experience with: PEALD, ALD, PECVD, CVD, Epitaxy, and/or other thin film deposition
• Knowledge of electrical characterization techniques for CMOS devices
• Application of dielectric and/or metal films for logic and memory structures
• Ability to independently manage complex process development projects, including personnel, project schedules, experimental thrusts, hardware procurement and budgetary oversight
• Understanding of requirements for integration of metals as work function materials and barrier layers in FEOL and BEOL process flows
• Demonstrated ability to develop and completely characterize deposition processes using first principles and experimental design techniques (e.g., DOE, RSM)
• Experience with the theory, practice, and interpretation of materials characterization techniques such as XPS, SIMS, RBS, AFM, XRD, HRTEM, FESEM, Auger, Raman and ellipsometry
• Excellent verbal and written communication skills in both English and Japanese, with ability to clearly communicate advanced technical constructs in direct and concise manner

Knowledge of electrical characterization techniques for CMOS devices is preferred

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