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Senior Engineer, ASIC Development Engineering

India, Bengaluru · Job Posted February 18, 2026
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Job Description

As a SoC Validation/Verification Engineer, you will play a key role in ensuring the quality and reliability of our SoC designs. Your work will enable industry-leading data storage control SoCs that are deployed in high-volume consumer and enterprise products.

Job Responsibility

  • Understanding complex ASIC specifications to create comprehensive Verification/Validation plans for both pre- and post-silicon validation
  • Independently developing and executing tests for verification and validation
  • Collaborating with cross-functional teams to drive closure of verification and validation activities
  • Signing off on verification and validation deliverables
  • Debugging and root cause analysis of issues found during validation
  • Developing and maintaining automated test environments and regression suites
  • Contributing to the continuous improvement of verification methodologies and best practices
  • End-to-end ownership of one or more subsystems or SoC verification and validation flows, including planning, execution, and closure

Requirements

  • BE or MS degree in Electrical Engineering or Computer Engineering
  • 4-6 years of experience in SoC pre-/post-silicon verification and validation, and bring-up
  • Deep understanding of C, embedded programming, and hardware/software co-validation methodologies
  • Strong knowledge of SoC verification environments, SystemVerilog (SV), and UVM concepts
  • Proven history of developing and executing verification and validation strategies for complex SoCs
  • Experience in verification and validation of industry-standard protocols such as DDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, and APB
  • Run complex SoC verification and validation scenarios on Palladium/Emulation platforms
  • Must understand and contribute to complex SoC-level testbenches, including UVM, C, and SystemVerilog components
  • Execute verification and validation cases in simulation environments and perform initial debug and root cause analysis
  • Strong experience in bring-up, including board initialization, power-on sequences, processor boot, and system-level debug for both pre- and post-silicon phases
  • Ability to understand and validate complex datapath flows of the controller
  • Hands-on experience in post-silicon ASIC bring-up, validation, and debug
  • Develop firmware, bare-metal tests, and Hardware Abstraction Layer (HAL) code
  • Should have a very good understanding of C, Python, or Perl scripting languages for test automation, data analysis, and tool development
  • Build and maintain validation infrastructure
  • Proficiency in debugging SoC issues across multiple domains (digital logic, firmware, timing, low-power, DFT) using JTAG, trace, waveform capture, and performance counters
  • Run and debug gate-level simulations, power-aware (UPF/CPF) validation, and validate ATE functional patterns
  • Validate and verify performance bottlenecks, traffic generation, and corner-case stress scenarios at the SoC level
  • Apply advanced verification methodologies, including constrained-random, coverage-driven, and assertion-based verification

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