Senior Engineer- IP Job at Ericsson (Noida)

Senior IP & Network Engineer

Ultahost, a rapidly expanding web hosting provider, is seeking an experienced Se...

Location

Salary:

Not provided

UltaHost

Expiration Date

Until further notice

Requirements

Minimum of 6 years hands-on experience in Network Engineering, specifically working with IP management and network infrastructure
Extensive knowledge of configuring and maintaining network equipment from Juniper, Cisco, and Arista
Proven expertise in advanced IP networking, subnetting, VLANs, and routing protocols (BGP, OSPF, MPLS)
Experience deploying and managing robust DDoS protection and mitigation systems
Strong analytical, troubleshooting, and problem-solving abilities
Excellent communication skills and ability to work independently in a dynamic, fast-paced environment

Job Responsibility

Manage, configure, and optimize network hardware, including Juniper, Cisco, and Arista switches
Oversee IP allocation, subnetting, and overall IP resource management
Implement and maintain robust network security measures, including advanced DDoS protection strategies
Troubleshoot network issues swiftly to minimize downtime and maintain optimal performance
Collaborate with data center and infrastructure teams to ensure network scalability, security, and reliability
Document network configurations, security procedures, and operational protocols

What we offer

Competitive salary and flexible remote/hybrid working options
Work with a cutting-edge team in one of the fastest-growing hosting providers
Opportunity to lead and innovate in a critical role impacting thousands of customers worldwide
Remote Flexibility
Career Growth
Inclusive Culture
Skill Growth

Fulltime

Senior DDR IP Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Raleigh

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
5+ years of pre-silicon subsystem or IP verification experience
3+ years of DDR subsystem verification experience
Demonstrated experience in verifying memory controller, DDR PHY, and/or at DDR sub-system level including integration verification of memory controller IP with DDR PHY and Electronic Design Automation (EDA) vendor sourced Dual In-line Memory Module (DIMM) Verification IP (VIP)
Deep understanding of JEDEC spec including mode registers, timing parameters, refresh operations, initialization, calibration, training, power management, and error handling
Experience with verification for a full product cycle from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff
Experience creating, maintaining, or integrating test benches, checkers and stimulus using Universal Verification Methodology (UVM), System Verilog Test Bench (SVTB), and optionally Python based post-processing checking
Aptitude for writing scripts/software with industry standard languages like Python
Experience applying generative AI to day-to-day tasks
Ability to meet Microsoft, customer and/or government security screening requirements

Job Responsibility

Own or lead verification of one or more aspects/features of a memory controller Intellectual Property (IP) and/or Double Data Rate (DDR) subsystem integration with Physical Layer (PHY)
Learn about the design and interact with partner teams to define verification strategies and test plans
Develop verification environments and run and debug simulations to drive quality
Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
Innovate to improve verification efficiency through methodologies or tools
Apply industry leading generative AI solutions to verification work
Coach and mentor others in your areas of expertise
Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Fulltime

IP LAN & Integrity Senior Engineer

The IP LAN and Integrity Senior Engineer is responsible for designing and implem...

Location

Romania , Bucuresti

Salary:

Not provided

Vodafone

Expiration Date

Until further notice

Requirements

Expert knowledge in TCP/IP, routing protocols, VOIP, WLAN, DHCP, DNS, AD, and network security systems
Experience with Firewalls, IDS/IPS, PKI, encryption, authentication, and content filtering platforms
Strong understanding of passive network and Data Centre infrastructure
Proven ability to define and deliver network documentation and harmonised solutions
Project management experience and ability to work across cultural and functional boundaries
Familiarity with ITIL processes and collaboration with Office IT and Data Centre teams
Academic degree or 3–5 years of experience in IT infrastructure support
Fluent in English (oral and written)
Knowledge of Mobile Network Operator environments and 3GPP standard architectures

Job Responsibility

Engineer High-Level and Low-Level Designs for IP LAN and security networks
Drive network optimisation and harmonisation across local markets
Implement virtualisation and segregation concepts, and conduct proof-of-concept validations
Manage network documentation and ensure alignment with architectural standards
Lead quality assurance, testing, and audit activities for deployed solutions
Collaborate with cross-functional teams and external partners to deliver seamless network services
Participate in tender processes and supervise third-party contributors
Promote network innovations and standardisation across the region
Support knowledge transfer and skill development within the implementation team

What we offer

Hybrid way of working: 2 days per week/ 8 per month
Medical and dental services
Life and hospitalization insurance
Dedicated employee phone subscription
Take control of your benefits and choose any of the below options: MEAL TICKETS/ PRIVATE PENSION/VACATION VOUCHERS/ CULTURAL VOUCHERS within the budget
Special discounts for gyms and retailers
Annual Company Bonus
Ongoing Education – we continuously invest in you to ensure you have everything needed to excel on the job and enhance your skills
You get to work with tried and trusted web-technology
We let you write your own story by planning vacations: go for a trip, experience new things, have fun and enjoy your 23 days off

Fulltime

Senior IP Design & Optimization Engineer

At Vodafone, we’re not just shaping the future of connectivity for our customers...

Location

Greece , Athens

Salary:

Not provided

Vodafone

Expiration Date

Until further notice

Requirements

University degree in Computer Science or Electrical engineering
5 years of professional experience in the telecom industry
Deep knowledge of IP Access & Backhaul technologies & architectures (routers/mw)
Knowledge of techniques to secure services and Infrastructure
Experience in deploy and optimize SDN solutions
Able to challenge given solutions and identify innovation opportunities
Able to understand & interact in both business & technical domains, capturing customer requests and adopting design accordingly
Able to engage markets in collaboration on technical topics

Job Responsibility

Devise services solutions & design for IP Backhaul & Access considering network evolution and future-proofness across the European Region
Introduce service performance dimensioning and KPI guidelines for the access and backhauling and track related service performance KPIs
Define QoS objectives and parameterization in IP Access and Backhaul network segment as part of a harmonized & optimized End to End QoS concept
Optimize Service performance through E2E alignment of Transmission and Transport design & use of best practices
Assess security compliance of IP Access & Backhaul NW acroos the European Region and provide recommendations/support plan definition to fill the gaps
Drive the introduction of SDN in relevant network segments
Alignment with network technology strategy and architecture, as well as efficient adaptation to local needs and requirements of local markets
Liaise with vendors and with other functions of Vodafone, to drive the evolution and design of Services in the markets in scope
QoS objectives and parameterization in Transmission (Microwave) and Transport network as part of a harmonized & optimized End to End QoS concept
Service optimization through E2E alignment of Transmission (Microwave) & transport design & use of best practices

What we offer

Award-winning work environment -certified #1 Top Employer in Greece
Competitive pay, bonus & remuneration package
Private Health & Medical Insurance
Hybrid way of working: a blend of remote and office-based working, including the option to work from abroad
Unlimited connectivity with our mobile, landline and Vodafone TV services – Experience first what our customers love
Unlimited access to learning resources and trainings
Vodafone Parental Leave: 16 weeks of fully paid parental leave to all employees regardless of gender, sexual orientation or length of service
Remote work equipment to help you create a comfortable, ergonomic workspace at home
Spirit of Vodafone days: dedicated time to pause, develop new skills and connect with our teams, values and services
Extra days off: Vodafone Day, Family Day, Volunteering Day

Senior Design Verification Engineer – Security IP

WHAT YOU DO AT AMD CHANGES EVERYTHING. At AMD, our mission is to build great pro...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

BSc with a minimum of equivalent 5 years relevant experience
or MSc with a minimum of equivalent 3 years
or PhD in a directly related research area and a minimum of 1 year
A minimum of equivalent 10 years relevant experience if as advanced level team members
Proven understanding of MP subsystem and/or common hardware datapath accelerator architectures as well as deep knowledge of applicable state-of-art verification methodology and best practices, if as advanced level team members
Proficient in System Verilog, object oriented programming, and scripting (using Ruby, Perl, Python and Makefile)
Proven skills in creating UVC and other UVM components. Experience with C-DPI and Formal Verification techniques are valuable assets
Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
Proven experience with ASIC verification tools: simulation, debugging, linting, power aware simulation, etc.
Relevant design domain specific knowledge and technical leadership capability required for advanced level candidates

Job Responsibility

Develop and maintain block level IP and MP subsystem verification architecture, testbenches, test methodology and infrastructure
Develop and debug test plans using SystemVerilog/UVM constrained-random test methodology, C-DPI directed test methodology, formal proof verification methodology, and using object-oriented programming (OOP) techniques to implement/maintain testbenches and tests
Triage regressions, debug simulations, analyze coverage, work/resolve technical issues with design, verification and other teams to achieve verification closure
Participate in MP subsystem specification, influence IP micro-architecture development (design for verification aspect), design and execute reusable test methodology across individual MP subsystems
Debug and solve integration issues with SoC Integration and SoC DV teams
Provide technical leadership in verification methodology development and critical problem resolution if as advanced level team members
Provide project execution leadership in term of technical assignment ownership, technical mentorship, task planning through divide and conquer, task progress reporting and forecasting if as advanced level team members

Fulltime

Senior RTL Design Engineer – Accelerator IP

Join Ericsson’s Accelerator IP team in Austin, TX as a Senior RTL Design Enginee...

Location

United States , Austin

Salary:

117000.00 - 175000.00 USD / Year

Ericsson

Expiration Date

Until further notice

Requirements

Several years of RTL design in complex ASIC/IP environments
Expert SystemVerilog/Verilog skills
End-to-end ASIC flow mastery: coding, linting, CDC, synthesis, timing closure
Proven ability to distill DSP, FEC, or other L1 processing algorithms into high-performance hardware
Equally comfortable deep-diving into code and shaping high-level architecture strategies
A collaborative powerhouse who thrives in an intense, creative, close-knit environment

Job Responsibility

Transform high-level architectural vision into blazing-fast, reliable RTL (SystemVerilog/Verilog)
Take complete ownership of major IP blocks—specification, microarchitecture, RTL creation, synthesis, and delivery
Act as the go-to technical lead for verification, backend/PD, and architecture teams
Drive optimizations to balance power, area, and throughput without compromising innovation
Lead critical design decisions that steer the next generation of telecom hardware

What we offer

Choice of three medical plan options
Dental plan option
Company credits for medical and dental premiums
Ericsson US 401(k) Plan with automatic 3% company contribution and matching
Company credits for basic life insurance, basic accidental death and dismemberment coverage, short-term and long-term disability coverage
Option to participate in Ericsson’s Stock Purchase Plan
Minimum of 15 days of accrued vacation
Up to 3 personal days per year
11 annual holidays
8 hours of volunteer time

Fulltime

Senior Manager-global Ip Engineer

We are seeking a highly skilled Global IP Engineer to join our Vodafone Network ...

Location

India , Pune

Salary:

Not provided

Vodafone

Expiration Date

Until further notice

Requirements

Extensive hands-on experience with Cisco routing and switching platforms (Nexus 7K/9K, Catalyst, VSS)
Strong understanding of MPLS, VRF segmentation, IPSEC, BGP, OSPF, and EIGRP protocols
Proven expertise in Cisco ACI fabric and SDN concepts, including automation tools (Python, Ansible) and REST API
Familiarity with firewall policies, load balancers, and integration with ACI
Excellent problem-solving, analytical, and communication skills
Ability to work under pressure and manage critical incidents effectively
Professional certifications such as CCNA, CCNP, and Cisco Data Centre Specialist or ACI-specific certifications are highly desirable

Job Responsibility

Deliver expert-level support and guidance to operations teams, ensuring timely resolution and knowledge transfer
Lead troubleshooting and resolution of high-severity network incidents involving MPLS, IPSEC, VRF, and related technologies
Configure and maintain APIC controllers, Nexus 9000 switches, and spine-leaf topology for Cisco ACI fabric
Manage lifecycle activities including upgrades, patches, and failover testing
Monitor ACI health and network performance using APIC dashboards, SNMP, Python/Ansible, and other tools
Perform root cause analysis (RCA) for recurring issues and implement preventive measures
Develop automation scripts using Python/Ansible for operational efficiency
Ensure compliance with security and operational standards while maintaining accurate documentation
Collaborate with cross-functional teams and interface with vendors for escalations

What we offer

Opportunity to work on cutting-edge technologies like Cisco ACI and SDN in a global environment
Exposure to complex, multi-technology networks and real-time operational challenges
Collaborative work culture with continuous learning and development opportunities

Senior Manager-GLOBAL IP ENGINEER

We are seeking a highly skilled Global IP Engineer to join our Vodafone Network ...

Location

India , Pune

Salary:

Not provided

Vodafone

Expiration Date

Until further notice

Requirements

Extensive hands-on experience with Cisco routing and switching platforms (Nexus 7K/9K, Catalyst, VSS)
Strong understanding of MPLS, VRF segmentation, IPSEC, BGP, OSPF, and EIGRP protocols
Proven expertise in Cisco ACI fabric and SDN concepts, including automation tools (Python, Ansible) and REST API
Familiarity with firewall policies, load balancers, and integration with ACI
Excellent problem-solving, analytical, and communication skills
Ability to work under pressure and manage critical incidents effectively
Professional certifications such as CCNA, CCNP, and Cisco Data Centre Specialist or ACI-specific certifications are highly desirable

Job Responsibility

Deliver expert-level support and guidance to operations teams, ensuring timely resolution and knowledge transfer
Lead troubleshooting and resolution of high-severity network incidents involving MPLS, IPSEC, VRF, and related technologies
Configure and maintain APIC controllers, Nexus 9000 switches, and spine-leaf topology for Cisco ACI fabric
Manage lifecycle activities including upgrades, patches, and failover testing
Monitor ACI health and network performance using APIC dashboards, SNMP, Python/Ansible, and other tools
Perform root cause analysis (RCA) for recurring issues and implement preventive measures
Develop automation scripts using Python/Ansible for operational efficiency
Ensure compliance with security and operational standards while maintaining accurate documentation
Collaborate with cross-functional teams and interface with vendors for escalations

What we offer

Opportunity to work on cutting-edge technologies like Cisco ACI and SDN in a global environment
Exposure to complex, multi-technology networks and real-time operational challenges
Collaborative work culture with continuous learning and development opportunities

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Senior Engineer- IP

Job Description

Job Responsibility

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