This list contains only the countries for which job offers have been published in the selected language (e.g., in the French version, only job offers written in French are displayed, and in the English version, only those in English).
We are looking for an adaptive, self-motivative DFT engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The DFT team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
Job Responsibility
Implementation and verification of DFT features like SCAN, MBIST, LBIST and JTAG
Support Spyglass-DFTDRC debug and coverage correlation
Scan insertion and ATPG pattern generation
ATPG patterns verification with gate-level simulation
Test coverage and test cost reduction analysis
Post silicon support to ensure successful bring up and enhance yield learning
Requirements
Bachelors degree w/7+ years or Masters degree w/5+ years in Electronics engineering/Electrical Engineering
Experience in scan-stitching
and has good knowledge of scan-stitching related concepts
Exposure to MBIST/BISR implementation and with the Tessent flow of mbist-insertion
Excellent hands-on ATPG
and is well conversed with the files required to run ATPG
Knowledge/experience with Tessent ATPG (mentor) is a plus
Knowledge on Spyglass-DFT
Excellent hands-on debug skills and scripting skills are critical
Knowledge on automation scripts like TCL/AWK/SED is a plus
Understands the basics of JTAG
Experience with post-silicon bring up is a plus
Nice to have
Knowledge/experience with Tessent ATPG (mentor) is a plus
Knowledge on automation scripts like TCL/AWK/SED is a plus