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We are looking for an experienced and highly driven Senior Analog Mixed-Signal Design Engineer to join our silicon development team. In this role, you will architect and design high-performance analog and mixed-signal integrated circuits for state-of-the-art data converter products. You will drive the development of novel circuit topologies, execute detailed transistor-level implementations, and lead silicon validation activities, while mentoring junior engineers. This is a key technical leadership position requiring deep analog expertise, strong hands-on design capability, and exceptional cross-functional collaboration skills to ensure first-pass silicon success.
Job Responsibility:
Lead the architecture definition and transistor-level design of high-performance analog and mixed-signal blocks including ADCs, DACs, PLLs, LDOs, bandgaps, amplifiers, comparators, clocking circuits, and complete data converter subsystems
Partner with system engineers and architects to translate system-level requirements into detailed circuit specifications and robust design implementations
Perform comprehensive transistor-level simulations and verification
Drive top-level integration of analog and mixed-signal subsystems
Collaborate closely with layout engineers to ensure optimal floorplanning, symmetry, matching, shielding, and parasitic-aware design techniques
Conduct post-layout simulations
Support silicon bring-up, lab validation, characterization, and root-cause debugging
Analyze silicon measurement results, ensure correlation with simulations
Contribute to and lead technical design reviews, risk assessments, and comprehensive documentation
Collaborate cross-functionally with digital design, verification, product engineering, and test teams
Provide strong technical leadership, mentor junior engineers, and continuously improve design methodologies
Requirements:
Proven track record of architecting, designing, and bringing to production multiple complex analog/mixed-signal ICs in advanced CMOS technologies
Deep expertise in high-speed, low-noise, and high-linearity analog circuit design
Strong technical leadership with a clear ownership mindset and accountability for deliverables
Excellent analytical, problem-solving, and debugging skills
Ability to mentor junior engineers and elevate overall team technical capability
Master's or PhD degree in Electrical Engineering or a related field, with a strong focus on analog/mixed-signal IC design
10+ years of hands-on experience in analog/mixed-signal IC design in deep submicron CMOS technologies
Strong foundation in analog fundamentals including device physics, noise analysis, linearity, stability, mismatch, yield, and reliability
Extensive experience with transistor-level circuit design and simulation tools within the Cadence design suite (e.g., Virtuoso, Spectre), including corner and statistical verification methodologies
Proven experience designing high-performance blocks such as data converters, clocking circuits (PLLs/DLLs), high-speed interfaces, or precision analog front-ends
Deep understanding of layout-dependent effects, matching strategies, parasitic extraction flows, and analog layout best practices
Hands-on experience with silicon lab validation, characterization setups, and systematic debugging methodologies
Familiarity with ESD, latch-up, reliability qualification, and production test considerations
Strong communication skills with the ability to work effectively in cross-functional and multicultural teams (English required)
Demonstrated ability to take full ownership of complex design blocks from concept definition through silicon validation and production release