Senior Analog Layout Design Engineer Job at AMD (Penang)

Senior Analog Design Engineer

We are the global test and automation specialists, powering next-generation tech...

Location

United States , Agoura Hills

Salary:

123100.00 - 193900.00 USD / Year

Teradyne

Expiration Date

Until further notice

Requirements

MSEE with 5 years of experience or PhD in electrical engineering with 3 years experience in the design and characterization of multiple, high frequency and high scale of integration mixed signal integrated circuits
Thorough knowledge of high frequency, broad-band Analog Mixed-Signal IC design – both electrical and physical design
Desire experience in design of VCOs, PLLs, DLLs, ADCs, DACs, clock and data recovery, broadband amplifiers, bias generators, clock distribution networks, high frequency I/Os, high frequency CML designs, high voltage, power circuits
Solid understanding of CMOS semiconductor device physics and device modeling
Solid understanding of electromagnetic theory
Solid understanding of transmission line theory
Solid understanding of thermal effects of various circuit topologies and different package types
Involvement in all phases of multiple IC developments from specification to product introduction
Solid understanding and experience with IC characterization at high frequencies using high speed sampling oscilloscopes, spectrum analyzers, VNAs, signal sources
Solid understanding of working with PDKs

Job Responsibility

Develop detailed circuit specifications for mixed signal circuits
Conceive circuit architectures and transistor level circuit topologies that satisfy required performance
Physical implementation (layout) of high speed circuits, either directly or assisting
Optimization of circuits via simulation (with Cadence EDA tools) over all process and operating conditions
Integration of circuit elements into large analog/mixed signals ASICs
Participation in the characterization of ASIC circuits

What we offer

medical
dental
vision
Flexible Spending Accounts
retirement savings plans
life and disability insurance
paid vacation & holidays
tuition assistance programs

Fulltime

Senior Analog Design Engineer

For our customer, a leading global provider of microcontrollers and semiconducto...

Location

Turkey , Istanbul

Salary:

Not provided

sHR Consultancy

Expiration Date

Until further notice

Requirements

Typically 5 – 10 years of experience
Strong competence with various tools and procedures, reaching specialist level
Ability to work with minimal instruction – either independently or collaboratively
Ability to make good judgment in selecting methods/techniques for obtaining solutions
Able to confidently share own expertise and work to others
Able to make significant contribution to projects, programs and business initiatives with creativity and ingenuity
Ability to support and mentor less experienced team members
Cross cultural awareness and sensitivity
Results-oriented and able to deliver on-time under tight schedule
Ability to work both independently and part of a team

Job Responsibility

Design, verification, and simulation of CMOS Analog blocks for power management circuits including voltage references, bias circuits, comparators and amplifiers meeting performance, area and power specifications
Collaborate with block leads to achieve system and design strategy for power management products
Guide layout team to ensure quality of layout of own design
Drive silicon debugging and design characterization
Drive lab evaluation in collaboration with Application Engineers for own design
Produce high-quality documentation for own IP blocks
Working closely with DFT engineers to ensure that own blocks follow existing strategy and implementation for DFT
Work closely with test and product engineers to support test development and ramp to production
Coach and mentor less experienced team members
Contribute to schematic and layout block-level reviews for blocks initially designed by others

What we offer

A competitive salary and benefits package
USD based compensation model
Educational and development opportunities
Hybrid working option

Fulltime

Senior Analog Design Engineer

The Interface & Custom Circuit Engineering team in AI-Silicon Engineering is see...

Location

India , Bangalore

Salary:

Not provided

Microsoft Corporation

Expiration Date

Until further notice

Requirements

BSEE or equivalent, MSEE/PhD preferred
7+ years of experience in analog circuit design, through full cycle post BSEE or equivalent
Experience with high-speed analog front-end serdes or D2D design (preferably PCIe, UCIe, D-PHY, USB), data-converters, PLLs, Regulators and all associated blocks in analog designs from architecture till silicon validation support
Experience in Design partitioning, power/jitter budgeting and timing analysis
Knowledge of lower power design techniques, calibration, parasitic extraction, EM/IR/ESD/Aging & Signal Integrity Design
Experience with the use of CAD-tools (Cadence, Mentor, Synopsys) for circuit schematic entry, simulations, post layout extractions, Mixed-mode simulations
Delivered Analog IP’s successfully in mass production in FinFET processes
Experience in mentoring individual engineers
Working with multiple stakeholders (arch/design/layout/silicon validation/project managers) to execute full design cycle till silicon
Excellent communication skills and self-motivated that can collaborate with larger teams within Microsoft

Job Responsibility

Lead Analog designs and delivery of cutting edge, high-performance, high-speed, low-power Analog IP designs for interconnectivity solutions and fundamental Analog circuit blocks for various Microsoft products in various process nodes including deep FinFet, following industry best practices
Technically deliver complex blocks that will produce schematics, verify in simulation, complete timing/jitter/power budgets and work with mask layout teams to deliver a final IP GDS
Coordinate tasks with junior members of the team, develop plans for Analog IP execution, follow processes/methodologies to deliver IP blocks
Coordinate bench validation of IP in Silicon, and IP characterization on bench and tester
Use established flows/methodologies/processes for execution
Work along with other members of the team to deliver IP’s, including project planning, schedule tracking, report generation
Interface with RTL, Verification and P&R team

Fulltime

Senior Analog Design Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

India , Hyderabad

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

MTech/MS with 2+ years or BTech/BS with 4+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field)
Proven expertise with FinFET technologies and CMOS tape-outs
Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures
Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC)
Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance
Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating)
Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators
Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results
Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk)
Excellent communication and documentation skills

Job Responsibility

Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications
Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed
Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality
Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance
Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews
Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements
Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Senior Quantum Analog Layout Engineer

Microsoft's Quantum team is building the first scalable, fault-tolerant quantum ...

Location

United States , Redmond

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role, including the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR), the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status for assessment of eligibility to access the export-controlled information
Ability to leverage AI tools to drive innovation and efficiency
Ability to work in an AI-first environment using modern AI tools to accelerate discovery through hardware development.

Job Responsibility

Deliver Schematic-to-Graphic Database System (GDS) layouts for cutting-edge, high-performance, high-speed, low-power IP designs, including interconnectivity solutions and foundational Analog circuit blocks
Execute these layouts across multiple process nodes, including deep Fin Field-Effect Transistor (FinFET), following industry best practices
Develop plans for Analog Mask Layout execution and follow processes and methodologies to deliver IP blocks
Coordinate tasks with junior layout team members as needed
Using Cadence Virtuoso (or other equivalent) design tools and flows
perform layout implementation of analog-intensive IPs and help establish flows, methodologies, and processes for execution alongside peers
Support the on-boarding and off-boarding of contingent layout staff and vendor partners as needed
help direct their day-to-day execution to ensure quality and schedule are met
Work with other members of the team to deliver IPs, including project planning, schedule tracking, and report generation
Follow, augment, or put in place processes and methodologies for high-quality execution alongside peers

What we offer

Certain roles may be eligible for benefits and other compensation
Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

Fulltime

Senior Analog Mixed-Signal Design Engineer

We are looking for an experienced and highly driven Senior Analog Mixed-Signal D...

Location

France , Paris; Caen; Grenoble

Salary:

Not provided

SCALINX

Expiration Date

Until further notice

Requirements

Proven track record of architecting, designing, and bringing to production multiple complex analog/mixed-signal ICs in advanced CMOS technologies
Deep expertise in high-speed, low-noise, and high-linearity analog circuit design
Strong technical leadership with a clear ownership mindset and accountability for deliverables
Excellent analytical, problem-solving, and debugging skills
Ability to mentor junior engineers and elevate overall team technical capability
Master's or PhD degree in Electrical Engineering or a related field, with a strong focus on analog/mixed-signal IC design
10+ years of hands-on experience in analog/mixed-signal IC design in deep submicron CMOS technologies
Strong foundation in analog fundamentals including device physics, noise analysis, linearity, stability, mismatch, yield, and reliability
Extensive experience with transistor-level circuit design and simulation tools within the Cadence design suite (e.g., Virtuoso, Spectre), including corner and statistical verification methodologies
Proven experience designing high-performance blocks such as data converters, clocking circuits (PLLs/DLLs), high-speed interfaces, or precision analog front-ends

Job Responsibility

Lead the architecture definition and transistor-level design of high-performance analog and mixed-signal blocks including ADCs, DACs, PLLs, LDOs, bandgaps, amplifiers, comparators, clocking circuits, and complete data converter subsystems
Partner with system engineers and architects to translate system-level requirements into detailed circuit specifications and robust design implementations
Perform comprehensive transistor-level simulations and verification
Drive top-level integration of analog and mixed-signal subsystems
Collaborate closely with layout engineers to ensure optimal floorplanning, symmetry, matching, shielding, and parasitic-aware design techniques
Conduct post-layout simulations
Support silicon bring-up, lab validation, characterization, and root-cause debugging
Analyze silicon measurement results, ensure correlation with simulations
Contribute to and lead technical design reviews, risk assessments, and comprehensive documentation
Collaborate cross-functionally with digital design, verification, product engineering, and test teams

Fulltime

Senior Staff Senior Silicon Design Automation Engineer

As a design engineer in our CAD and methodology team, you will be responsible fo...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

TCL, Python, PERL, or other scripting languages
PDK, technology enablement
Simulation environments for Spice, PVT
Virtuoso based custom Layout tools and flows
Calibre extraction flows, Totem & Redhawk for EM/IR
SiliconSmart, PrimeTimePhysical aspect of VLSI designs
Strong written and verbal communication skills
Bachelors or Masters degree in computer engineering/Electrical Engineering

Job Responsibility

Execute in CAD infrastructure team supporting multiple IC design projects
Establish and maintain standardized design flows and methodologies
Implement and support customized CAD flows for Fabric design groups
Enable the team in meeting the design and development targets by working closely with external tool vendors
Develop tools flows methodologies on digital back-end domains, sign-off flows for timing, power, EM/IR, DRC/LVS/DFM, etc.
Improve engineering efficiency while improving design quality in IP release process
Be single point contact for bugs and issues for custom and analog physical design team
Build flow in TCL, Python to ensure quality and faster executions
Understand different methodologies used across industry to adopt best practices
Leverage and deploy AMD AI systems to design teams

Fulltime

Senior Hardware Design Engineer

Senior R&D Hardware Design Engineer – Next‑Generation Networking. Design at scal...

Location

Singapore , Singapore

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Electronic Engineering or a closely related discipline
Minimum of 10 years of experience in complex systems and hardware design, including integrated circuits and high‑performance electronic platforms such as servers, mobile devices, or similar systems
Deep technical expertise in both digital and analog circuit design
Strong analytical and problem‑solving skills
Demonstrated technical leadership, including experience in mentoring, guiding, and influencing engineering teams
Solid knowledge of, and strong interest in, high‑speed design, including signal integrity challenges and power distribution techniques
Hands‑on experience in the measurement, testing, and characterization of high‑speed digital signals
Extensive board‑level design experience using Cadence CAD tools such as OrCAD and Allegro
Excellent interpersonal skills with the ability to work effectively in both collaborative team environments and independently
Demonstrated ability to make sound, autonomous decisions in technically complex situations

Job Responsibility

Lead and own complex hardware designs, including component selection, schematic capture, board‑level architecture, bring‑up, debug, and validation
Drive high‑speed digital design decisions, addressing signal integrity, power distribution, and performance trade‑offs at the system level
Partner closely with cross‑functional and multi‑site teams—including layout, validation, manufacturing, and firmware—to deliver production‑ready designs
Influence design feasibility, margins, and reliability through upfront analysis and hands‑on validation
Perform deep root‑cause analysis and empirical testing on new and evolving designs, setting technical direction and best practices
Mentor junior engineers and contribute to continuous improvement of design methodologies and engineering standards

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

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Senior Analog Layout Design Engineer

Job Description

Job Responsibility

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