RTL Emulation Engineer Job at AMD (San Jose)

Staff Engineer, VLSI Design Engineering

We are looking for a highly motivated engineer to develop synthesizable RTL mode...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

4 to 7 years of experience in RTL design, UVM validation, and emulation support
Bachelors/Masters from a reputed College/University with Electronics and communication/Embedded Systems background
Strong Problem Solving and Debug skills
Efficient Communication
Strong expertise in Verilog/SystemVerilog RTL coding and digital design fundamentals
Hands-on experience with UVM methodology and testbench development
Familiarity with emulation platforms (e.g., Cadence Palladium, Protium, Synopsys ZeBu, Mentor Veloce)
Proficiency in simulation tools (e.g., VCS, Questa, Xcelium) and waveform debug
Scripting skills in Python, TCL, or Perl for automation and testbench control
Understanding of SoC architecture, clock/reset domains, and interface protocols (AXI, APB, PCIe, etc.)

Job Responsibility

Develop clean, synthesizable RTL models for IP blocks and subsystems using Verilog/SystemVerilog
Collaborate with design teams to ensure RTL is emulation-friendly and meets performance and debug requirements
Create and maintain UVM-based testbenches to validate RTL functionality and coverage
Debug RTL and testbench issues using simulation and emulation tools
Package and deliver validated RTL models to the emulation team, including synthesis scripts, configuration files, and documentation
Support emulation bring-up and assist in resolving integration issues

Fulltime

Staff Engineer, VLSI Design Engineering

We are looking for a highly motivated engineer to develop synthesizable RTL mode...

Location

India , Bangalore

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

4 to 7 years of experience in RTL design, UVM validation, and emulation support
Bachelors/Masters from a reputed College/University with Electronics and communication/Embedded Systems background
Strong Problem Solving and Debug skills
Efficient Communication
Strong expertise in Verilog/SystemVerilog RTL coding and digital design fundamentals
Hands-on experience with UVM methodology and testbench development
Familiarity with emulation platforms (e.g., Cadence Palladium, Protium, Synopsys ZeBu, Mentor Veloce)
Proficiency in simulation tools (e.g., VCS, Questa, Xcelium) and waveform debug
Scripting skills in Python, TCL, or Perl for automation and testbench control
Understanding of SoC architecture, clock/reset domains, and interface protocols (AXI, APB, PCIe, etc.)

Job Responsibility

Develop clean, synthesizable RTL models for IP blocks and subsystems using Verilog/SystemVerilog
Collaborate with design teams to ensure RTL is emulation-friendly and meets performance and debug requirements
Create and maintain UVM-based testbenches to validate RTL functionality and coverage
Debug RTL and testbench issues using simulation and emulation tools
Package and deliver validated RTL models to the emulation team, including synthesis scripts, configuration files, and documentation
Support emulation bring-up and assist in resolving integration issues

Fulltime

Asic Engineer, Implementation

Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologie...

Location

United States , Sunnyvale

Salary:

166000.00 - 198220.00 USD / Year

Technologist, ASIC Development Engineering

The ASIC emulation team is seeking highly motivated Emulation engineer to join a...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BE or MS degree in Electrical Engineering or Computer Engineering, with 15+ years of experience
Solid experience working on emulation platforms such as Veloce, Zebu, or Palladium (compilation, debug, performance, and throughput tuning)
Debugging experience is a must particularly in HW/SW co-debug environments
Knowledge of one or more protocols
SPI, DDR, SATA, USB, AXI, PCI, PCIe or I2C
Experience developing C++, Python, Perl, Shell and TCL test content
Experience debugging failures using waveform viewers, log files and trace dumps
Working knowledge of Linux/Unix environment and shell scripting
Excellent debugging and problem-solving skills with simulation and emulation environments
Cross-Functional Collaboration: Ability to work closely with design, validation, firmware, and physical design teams to resolve system-level issues

Job Responsibility

Providing technical leadership and expertise to define requirements for Emulation and Emulation IP development
Create emulation models from RTL / Netlist. Develop hardware collateral to be integrated with the Palladium / FPGA emulation mode
Experience in Palladium or Zebu Platforms Automation and increase process efficiencies
Collaborating cross-functionally to optimize emulation workflows and standardize methodologies
Work with extended teams to debug environment and drive cross-functional testing (Firmware, Software, Verification and Design)
Triage failures with design, verification, firmware, software teams
Mentoring and guiding junior engineers, fostering a culture of collaboration, innovation and continuous improvement

Fulltime

New

Hardware Engineering Intern

As an AMD intern you’ll be placed at the epicenter of the AI ecosystem, working ...

Location

Serbia , Belgrade

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Currently enrolled in a Serbia-based University in a BSc (4th year) or MSc program majoring in Electrical Engineering, Computer Engineering, or related discipline
Knowledge/experience with digital design fundamentals and RTL (Verilog/SystemVerilog)
Programming in C/C++ and familiarity with embedded FW concepts
Scripting languages such as Python, Perl, or similar
Linux/UNIX development environments
Verification, emulation, or related hardware development workflows
Understanding of industry protocols (PCIe, CXL, DDR, AMBA) is a plus
Demonstrate proficiency in using AI prompts to support and enhance daily work tasks

Job Responsibility

Support simulation, verification, and debugging of ASIC and RTL designs
Contribute to testbench development, reusable components, and infrastructure for DV and emulation
Develop scripts, tools, and automation flows using Python, Perl, C/C++, or similar languages
Participate in firmware bring‑up and validation for the Design Under Test
Collaborate with cross‑functional teams on test planning and execution
Use AI tools and prompts to enhance daily engineering workflows

Fulltime

New

Senior Silicon Engineer

Microsoft is a highly innovative company that collaborates across disciplines to...

Location

India , Bangalore

Salary:

Not provided

Microsoft Corporation

Expiration Date

Until further notice

Requirements

10+ more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s
Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++
Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
Scripting language such as Python or Perl

Job Responsibility

Own or lead verification of complex flows at the SOC, subsystem, or IP levels
Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios
Learn about the design and interact with partner teams to define verification strategies and test plans
Develop verification environments and run and debug simulations to drive quality
Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
innovate to improve verification efficiency through methodologies or tools
Coach and mentor others in your areas of expertise
Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Fulltime

Principal Verification Engineer

Microsoft is a highly innovative company that collaborates across disciplines to...

Location

India , Bangalore

Salary:

Not provided

Microsoft Corporation

Expiration Date

Until further notice

Requirements

12+ more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s
Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++
Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
Scripting language such as Python or Perl

Job Responsibility

Own or lead verification of complex flows at the SOC, subsystem, or IP levels
Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios
Learn about the design and interact with partner teams to define verification strategies and test plans
Develop verification environments and run and debug simulations to drive quality
Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
innovate to improve verification efficiency through methodologies or tools
Coach and mentor others in your areas of expertise
Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Fulltime

Firmware Engineering Lead

We are looking for an experienced and passionate Firmware Engineer to join the N...

Location

Serbia , Belgrade

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Extensive experience with microcontrollers and embedded C/assembly programming
Strong understanding of low-level HW/FW interfaces and performance optimization
Familiarity with multi-core firmware design and techniques
Experience with Real-Time Operating Systems (RTOS) and board support packages
Experience with hardware abstraction layers and shared code bases
Proficiency in Agile/Scrum firmware development methodologies
Hands-on experience with pre-silicon FW development environments, including emulation, RTL simulation, and modeling platforms
10+ years of firmware development experience, with proven leadership capability
Exposure to AI-driven development tools and workflow optimization
Bachelor's or Master's degree in electronics/computer engineering or other applied sciences

Job Responsibility

Build and scale a local NBIO firmware team, including hiring, mentoring, and managing a mix of full-time employees and contractors
Lead day-to-day development efforts, including design, implementation, and co-verification of embedded firmware
Work within the broader NBIO firmware team to drive technical excellence and FW development best practices
Apply AI tools and techniques to improve workflows and accelerate development
Collaborate across sites and functions

RTL Emulation Engineer

AMD

Location:
United States , San Jose

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
March 25, 2026

Looking for more opportunities? Search for other job offers that match your skills and interests.

Similar Jobs for RTL Emulation Engineer

Staff Engineer, VLSI Design Engineering

Staff Engineer, VLSI Design Engineering

Asic Engineer, Implementation

Technologist, ASIC Development Engineering

Hardware Engineering Intern

Senior Silicon Engineer

Principal Verification Engineer

Firmware Engineering Lead

RTL Emulation Engineer

AMD

Location:United States , San Jose

Category:IT - Software Development

Contract Type:Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:March 25, 2026

Looking for more opportunities? Search for other job offers that match your skills and interests.

Similar Jobs for RTL Emulation Engineer

Staff Engineer, VLSI Design Engineering

Staff Engineer, VLSI Design Engineering

Asic Engineer, Implementation

Technologist, ASIC Development Engineering

Hardware Engineering Intern

Senior Silicon Engineer

Principal Verification Engineer

Firmware Engineering Lead

Location:
United States , San Jose

Category:
IT - Software Development

Contract Type:
Not provided

Job Posted:
March 25, 2026