RAS Lead engineer Job at AMD (Austin)

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Platform Soc Debug Lead Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...

Location

United States , Austin

Salary:

200000.00 - 300000.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Strong understanding of Server platform components, x86 or other complex CPU architectures
Deeper domain expertise in areas such as IO interfaces - PCIe, CXL, RAS, Power management to drive comprehensive system level test-plan execution
Understanding of BMC firmware and features, including IPMI, Redfish, sensor monitoring, power control, and remote management is a plus
Prior experience with computer system design and/or validation, testing tools, and environments
Experience with handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools
Proficiency in C, Python, and shell scripting for low-level development and debug
Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines
Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization
Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up) is a plus
BS or MS degree in Electrical Engineering or related major, with 12+ years of applicable experience

Job Responsibility

Lead platform and SoC debug for EPYC/AI server platforms, driving issue resolution, validation, and quality to meet program milestones
Lead debugging efforts for enabling AI/Server SoC platforms in domains such as high-speed data-center I/O (PCIe, CXL, etc.), RAS features to resolve issues efficiently that are seen from the program execution
Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment
Improve debug capabilities and methodology over time by identifying common challenges or impediments to efficient debug and working with partner organizations like design, Firmware and software teams to drive innovation in silicon architecture, design, tools and methods
Manage and track technical issues, risks, and priorities effectively with the business unit and SW Debug tools teams
Manage customer and executive communications, including program status, risks and opportunities
Maintain strong communication skills, both verbal and written, to convey summary findings and recommendations to senior management

Fulltime

Systems Design Engineer - RAS Enablement

We are looking for a dynamic, energetic and a strong Enablement Engineer for RAS...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

8+ years of silicon validation for multiple any SoCs especially x86 containing multi core CPU/GPU subsystems with focus on RAS implementation across different IPs
Expertise of RAS features pertaining to Memory, PCIE, Reset flows, Out of Band features
Strong understanding of x86 HW, FW and BIOS Architecture
Strong communication and cross-functional collaboration abilities
Exposure to certain stages of Silicon Validation will be crucial, including use-case validation

Job Responsibility

Owning RAS sub system implementation based on the Product requirements
Conducting day-to-day experiments for RAS
Maintaining Test plans and reports and scrubbing the JIRA tickets on a periodic basis
Developing required test scripts for small tasks
Problem solving
Work with the RAS Lead and senior members in refining the processes, and demonstrate keen interest to learn and explore new methods/ideas pertaining to memory subsystem

Fulltime

RAS Lead

At AMD, our mission is to build great products that accelerate next-generation c...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

13 years of Solid Experience and Knowledge in the HW and FW aspects of RAS feature implementation of x86 IPs like Cores, Memory, Inband and OOB RAS
Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans
Great uplevelling skills to senior management
Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution
Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW
Experience in High Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects
Experience in Power Management
Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc
Preferred experience with scripting using TCL, Python
Excellent communication, collaboration, articulation, upleveling to senior management and team playing skills

Job Responsibility

Define and develop the RAS charter for the Embedded BU as a center of excellence
Ensure robust planning at the pre-silicon stage, working with DV or Emulation teams and support the Leads and engineers in framing the relevant specification and test cases
Closely work with the Architects and execute the RAS feature enablement and validation with rigour and timeliness
Bigger picture planning for roadmaps and process improvements
Create a cohesive culture of openness, diversity, technical growth for the team members
Act with great resolve during testing times of critical issues, milestones, customer escalations and BU related internal changes
Exhibit strong leadership qualities to take the team forward towards growth and achieving the mission of the company
Exhibit great technical depth in the post silicon enablement and validation to take the right technical decisions for the team
Ensuring the program asks for quality and time metrics and feature enablement are met without any glitches, with minimal senior management overseeing
Synergize with the Pre-silicon and DV teams and other stakeholders for proper interception of milestones and risk callouts

What we offer

AMD benefits at a glance

Fulltime

UEFI / BIOS / RAS Firmware Engineer

Exciting opportunity within the Embedded BIOS development team working on latest...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

5+ years of experience in the x86 BIOS/UEFI/coreboot development
Exposure to pre-silicon BIOS development in a simulation/emulation environment
Experience with x86 CPU/APU architectures and associated compilation tools
Expert in C language
knowledge of x86 assembly
Experience with platform bring-up
Familiar with at least one BIOS code base (AMI, Insyde, Phoenix BIOS, coreboot, EDKII)
Hands on experience with hardware debugging tools like AMD HDT, ITP, Arium, etc.
Able to read and interpret hardware schematics
Knowledge of ACPI, USB, NVMe, SATA, PCIe, and other PC industry standards

Job Responsibility

Responsible for BIOS and pre-OS driver development including design, documentation, unit testing and debug for pre and post silicon support
Support customer support Team on need basis
Engage with technical leads to understand BIOS/firmware scope and work on implementation to meet schedules and milestones
Work with internal and external teams to ensure highest level of quality and satisfaction throughout firmware lifecycle
Must be well-organized, technically oriented, and a self-starter with a demonstrated ability to work collaboratively and coordinate activities with geographically distributed technical teams
Desire to work and succeed on fast-paced and highly dynamic environments
BIOS/FW simulation emulation experience Pre-silicon environment
Hands on debugging with emulator, simulation environment

Fulltime

Lead x86 BIOS/UEFI/coreboot development Engineer

Exciting opportunity within the Embedded BIOS development team working on latest...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

13+ years of experience in the x86 BIOS/UEFI/coreboot development
Exposure to pre-silicon BIOS development in a simulation/emulation environment
Exposure to Emulation environments like Synopsis-Zebu-ZS5/Cadence-Palladium/Siemen-Veloce
Experience with x86 CPU/APU architectures and associated compilation tools
Expert in C language
knowledge of x86 assembly
Experience with platform bring-up
Familiar with at least one BIOS code base (AMI, Insyde, coreboot or Phoenix BIOS) and also FSP development experience
Hands on experience with hardware debugging tools like AMD HDT, ITP, Arium, etc.
Able to read and interpret hardware schematics

Job Responsibility

Responsible for BIOS and pre-OS driver development including design, documentation, unit testing and debug for pre and post silicon support
Apply a data minded approach to target optimization efforts
Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture
Design and develop new groundbreaking AMD technologies
Participating in new ASIC and hardware bring ups
Debugging/fix existing issues and research alternative, more efficient ways to accomplish the same work
Develop technical relationships with peers and partners

System Design & Debug Manager – AI Customer Engineering

This role serves as the debug execution backbone of AMD's AI Customer Engineerin...

Location

United States , Santa Clara

Salary:

186080.00 - 279120.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Deep understanding of data center system architecture (CPU, GPU, FPGA, memory, connectivity, RAS, hotplug)
Familiarity with hardware bring up, validation, manufacturing, and test flows
Knowledge of reliability and quality metrics (yield, DPM, FIT)
Proven years of experience in the semiconductor industry
Deep hands-on experience with silicon debug (pre-silicon and post-silicon)
Strong background in product development, debug tools, validation, failure analysis, or customer engineering
Proven experience managing complex debug programs across multiple customer segments
Strong functional team and project management skills with ability to drive execution across global, cross-functional teams
Excellent written and verbal communication skills, including executive-level engagement
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field required

Job Responsibility

Debug Program Leadership - Lead debug execution across hyperscale, OEM, HPC, and enterprise customer programs. Own high-impact, cross-customer and systemic issues and maintain visibility into top risks and trends
Customer Program Integration - Partner with Customer Program Managers to align debug execution with customer deliverables, platform readiness, and deployment schedules. Support escalations and executive-level customer engagements
Technical Debug Coordination - Drive cross-functional debug efforts across design, validation, product engineering, and failure analysis. Align pre- and post-silicon debug strategies and connect lab debug to real-world customer environments
Field Failure & Fleet Quality Management - Lead resolution of field failures, fleet anomalies, and data center reliability issues. Aggregate fleet, RMA, and production signals and feed learnings back into design, validation, and manufacturing
Governance & Process Improvement - Own debug tracking, prioritization, risk management, and executive reporting. Apply structured methodologies (8D, CAPA, FMEA) and drive continuous improvement in execution speed and consistency

Fulltime

Civil Engineer III

Bowman has an opportunity for a Civil Engineer III to join our team in San Diego...

Location

United States , San Diego

Salary:

96000.00 - 120000.00 USD / Year

Bowman

Expiration Date

Until further notice

Requirements

Bachelor's degree in civil engineering or related field required at time of hire
Five or more (5+) years of experience in the land development industry
Experience with computer applications and civil engineering design software such as Civil3D in a professional or academic setting
Proficiency with reading construction plans
Proficient with Storm Drain Modeling and Rational Method Hydrologic Calculations
Proficient with Open Channel & Detention Basin Modeling and Design
Proficient with HEC-RAS modeling and CLOMR/LOMR applications and processing
Experience researching zoning, development standards, development review processes, compliance matters, regulations, and standards
Prepare reports, narratives, development applications, submittal documents, and response letters
Ability to multi-task and coordinate on multiple projects, with multiple clients and sub-consultants

Job Responsibility

Carry out complex or novel assignments requiring the development of new or improved civil engineering techniques or procedures to create new or refined equipment, materials, processes or methods
Assist with the marketing of the firm’s capabilities to establish new clients and enhance relationships with existing clients
Work with senior level engineers, clients and agencies, subcontractors, and design teams on complex engineering project issues
Review and interpret zoning regulations in a variety of municipalities
Use advanced techniques, theory precepts and practices in the civil engineering field and related sciences and disciplines
Assist project team with obtaining local and state permits for land development projects
Conceptualize the initial civil design approach for assigned phases of land/site development
Serve as a lead in the technical direction over other less experienced engineers and provide direction, guidance and delegation of assignments
Serve as technical specialist and liaison between clients and agencies, subcontractors, and design teams on complex project issues
Provide technical assistance in the resolution of design problems that may include performing field investigation or inspections, detailed design work and calculations, and detailed checking of design computations done by others, or general coordination of specific design aspects into a project

What we offer

Medical, dental, vision, life, and disability insurance
401(k) retirement savings plan with company match
Paid time off, sick leave, and paid holidays
Tuition reimbursement and professional development support
Discretionary bonuses and other performance-based incentives
Employee Assistance Program (EAP), wellness initiatives, and employee discounts
May be eligible for remote or hybrid work arrangements

Fulltime

Water Lead Designer - Project Manager

Location

United States of America , Draper

Salary:

120000.00 - 160000.00 USD / Year

Consor engineers

Expiration Date

Until further notice

Requirements

8+ years of experience in stormwater, water & wastewater, or water resources engineering
Bachelor's degree in Civil, Environmental, Chemical, Construction Management, or a related engineering discipline
Professional Engineer (PE) license (required)
Strong technical foundation aligned with your design team focus: Hydrology, hydraulics, and drainage or Municipal water and wastewater infrastructure
Proficiency in OpenRoads, Civil 3D, and/or AutoCAD
(OpenRoads preferred
training available)
Experience with HEC‑HMS, HEC‑RAS, SWMM, StormCAD, or similar tools (preferred, not required)
FEMA floodplain mapping and agency coordination experience (preferred)
UDOT or Mountain West municipal project experience (a plus)

Job Responsibility

Project Management & Client Leadership: Serve as Project Manager for municipal infrastructure projects within Stormwater and drainage, or Water and wastewater conveyance and treatment systems
Manage project scope, schedules, budgets, and staffing to meet contractual and client expectations
Act as the primary point of contact for clients, agencies, and stakeholders
Support business development efforts, including proposals, interviews, and ongoing client engagement
Identify project risks early and proactively develop mitigation strategies
Technical Oversight & Engineering Excellence: Provide senior-level technical oversight within your assigned design team
Stormwater Design Team Focus: Hydraulic and hydrologic (H&H) modeling and drainage studies
Stormwater management systems and municipal drainage infrastructure
Floodplain analysis and FEMA coordination
Water / Wastewater Design Team Focus: Water and wastewater conveyance systems, including pipelines, pump stations, and lift stations

What we offer

Tuition reimbursement program
Paid professional training
Major license achievement bonus
Extensive on-demand learning center
Paid professional memberships
Industry-competitive PTO
Seven paid holidays and two floating holidays
Flexible work schedules
Paid parental leave
Eligibility for hybrid and remote work options for some employees based on role responsibilities

Fulltime

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RAS Lead engineer

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