Principal Silicon Design Verification Engineer

• Own the development of C and C++ based test content at the subsystem and SoC levels
• Build and maintain the C test infrastructure that the broader team relies on
• Own the pre-silicon verification strategy and execution for one or more security IP blocks and subsystems
• Architect and extend SystemVerilog and UVM environments that host C-based stimulus
• Drive coverage signoff across functional, code, and power-aware coverage
• Act as verification lead and technical point of contact for customer and partner teams
• Mentor and guide less experienced engineers
• Improve verification efficiency by building reference and prediction models, automation, and debug tooling in Python and other scripting languages

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience
• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role
• Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
• This role will require access to information that is controlled for export under export control regulations
• successful candidate will be required to provide either proof of their country of citizenship or proof of their US residency or other protected status
• successful candidate's citizenship will be verified with a valid passport

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR Master's Degree AND 8+ years OR Bachelor's Degree AND 12+ years OR equivalent experience
• Experience developing tests in C/C++, SystemVerilog, and UVM, with emphasis on C/C++ test content for subsystem and SoC verification
• Experience leading pre-silicon verification of IP, subsystems, and SoCs through the full cycle
• In-depth knowledge of verification principles, testbench architecture, and stimulus generation
• Experience directing and mentoring individual engineers
• Experience collaborating across architecture, design, block-level DV, and firmware teams
• Understanding of silicon and/or computer architecture
• Proficiency in a scripting language such as Python, Ruby, or Perl
• Experience with emulation, FPGA prototyping, RTL design for FPGA or emulation, or post-silicon validation
• Experience with assembly, startup code, linker scripts, and Makefile-based build flows
• Familiarity with industry protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, or USB
• Hands-on hardware debug experience with tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters

Benefits and other compensation