CrawlJobs Logo

Principal Silicon Design Verification Engineer

United States, Santa Clara Employment contract 142800.00 - 304200.00 USD / Year · Job Posted June 15, 2026
Apply Position
Job Link Share

Job Description

As a Principal Engineer - ASIC verification in the Data Processing Unit team you will be validating silicon to solve complex problems in a datacenter. You will interact with the architecture team to develop a programmable silicon implementation. This position is expected to be highly visible and impactful. The vast breadth of domains required to build our DPU silicon gives the perfect opportunity to experience different areas of expertise. The depth required to solve complex engineering problems utilizes your experience and provides you with the perfect platform to shine and grow to the next stage in your career.

Job Responsibility

  • As a Principal Engineer in the Data Processing Unit team, you will be validating silicon to solve complex problems in a datacenter
  • Lead key components of functional validation of complex ASIC SOC using UVM/C test bench
  • Perform pre-silicon SoC verification, post-silicon validation by defining testing strategies
  • Work with cross functional teams, architecture, design, verification, partner teams for project execution and influence next generation designs
  • Develop test plan, C tests and infrastructure to complete functional validation of complex design and report bug/issues
  • Running tests, debugging failures, creating stress and performance scenarios to meet test plan goals
  • Actively participate in chip bring up and write test firmware to support various teams
  • Innovate to improve validation efficiency through methodologies and tools
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Nice to have

  • 10+ years of experience in pre-silicon validation with a proven track record of delivering high performance Network switches/accelerators, Central Processing Unit (CPU), Vector processors and Graphics Processing Unit (GPU’s) or relevant experience
  • Experience in UVM/C verification methodology
  • Knowledge of Ethernet, TCP/IP, ROCEv2, MAC/PCS, Networking NIC/Switches
  • Proven track record with the definition and development of complex SoCs. In depth understanding of processors and peripheral interconnect bus protocols and architectures
  • Strong proficiency in Verilog, System Verilog, and UVM based testbench environment
  • Experience building UVM testbenches, managing regressions, meeting code coverage and functional coverage goals to successful tapeout.

Looking for more opportunities?

Search for other job offers that match your skills and interests.

Similar Jobs for

Principal Silicon Design Verification Engineer

8 matching positions

Principal Design Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Raleigh
Salary
Salary:
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • Ability to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • Provide proof of citizenship or US residency/protected status for export control assessment
  • 5+ years of pre-silicon subsystem or IP verification experience
  • Demonstrated expertise in leading verification of designs that utilize Coherent Hub Interface (CHI) and Advanced Microcontroller Bus Architecture (AMBA) protocols
  • Demonstrated expertise in one or more of the following: fabric interconnects, coherency, virtualization, security, interrupts, PCIe, CXL, and/or protocol bridges
  • Experience driving IP verification for multiple product cycles from definition to silicon, including writing IP/block or subsystem level test plans, developing tests, debugging failures and coverage signoff
Job Responsibility
Job Responsibility
  • Own or lead verification of complex flows at Fabric Interconnect or at block level
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop UVM-based verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • Innovate to improve verification efficiency through methodologies or tools
  • Apply industry leading generative AI solutions to verification work
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right

Principal Design Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Mountain View
Salary
Salary:
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • 9+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems
  • 5+ years’ industry experience of chip and/or computer architecture
  • 5+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl
  • CPU or Graphics core verification experience
  • In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure
Job Responsibility
Job Responsibility
  • Creation of complex verification environments and tests, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation
  • Interact with architects and design engineers to create verification plans covering strategy, test environments & tests, and verification requirements for IP/SS/SOC level verification
  • Create and drive test-plans and test development to provide complete features coverage
  • Develop and implement technical solutions to complex quality and design challenges
  • Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage
  • Triage and debug testbench, simulation, and emulation fails
  • Develop Makefiles and scripts for scalable and efficient verification
  • Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment
  • Collaborate with teams across sites and geographies
  • Fulltime
Read More
Arrow Right

Principal Quantum Design Verification Engineer

At Microsoft Quantum, we aim to empower science and scientists to solve the worl...
Location
Location
United States , Redmond
Salary
Salary:
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Physics, Engineering, or related field AND 3+ years experience in industry or in a research and development environment
  • OR Master's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
  • OR Bachelor's Degree in Physics, Engineering, or related field AND 8+ years experience in industry or in a research and development environment
  • OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • Microsoft Cloud Background Check
  • Citizenship & Citizenship Verification
  • Ability to leverage AI tools to drive innovation and efficiency
  • Ability to work in an 'AI-first' environment using modern AI tools to accelerate discovery through hardware development
Job Responsibility
Job Responsibility
  • Own verification environments and tests for IP and SoC designs, and validate designs in simulation with both pre- and post-layout Register-Transfer Level (RTL) and netlists
  • Coordinate the execution of contingent staff and external vendors to ensure verification deliverables meet specification and schedule
  • Set up and manage databases and flows for SoC and IP repositories
  • set up bug-tracking systems and log, track, manage, and close bugs and issues
  • drive milestone reviews and status reports
  • Create test plans for pre-silicon simulation verification across both digital and analog components, including the development of Analog Mixed-Signal (AMS) simulation models
  • Collaborate with the Design For Test (DFT) team to test DFT features
  • Align verification methodologies with wider teams and drive continuous improvement to Design Verification processes for at-scale execution
  • Collaborate effectively with architects, analog mixed-signal designers, verification engineers, and physical design, DFT, and other front-end design teams
  • Embody our culture and values
  • Fulltime
Read More
Arrow Right

Principal ASIC Design Verification Engineer

As a Design Verification engineer on the ASIC team, you will ensure that the ASI...
Location
Location
United States , Santa Clara
Salary
Salary:
173600.00 - 280700.00 USD / Year
paloaltonetworks.com Logo
Palo Alto Networks
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BS in EE, CE, or CS required or equivalent military experience required
  • MSEE preferred
  • Minimum 5 years experience in ASIC design verification
  • Demonstrated success in taking multiple ASIC products from concept to mass production
  • Expertise in SystemVerilog and UVM
  • Technical strength in the following areas is required: Defining test plans, including comprehensive adversarial testing
  • Developing rich functional coverage models
  • Creating powerful and scalable test benches
  • Implementing sophisticated self-checking infrastructure with reference models and scoreboards
  • Developing reusable constrained-random tests
Job Responsibility
Job Responsibility
  • Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, emulation, and formal verification
  • Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies
  • Develop flows, methodologies, and infrastructure for emulation
  • Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers
  • Define new tools and methodologies to continuously improve quality and velocity
  • Create powerful programs in Python to automate triage, coverage closure, and metrics-driven verification
  • Fulltime
Read More
Arrow Right

Principal Silicon Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Mountain View
Salary
Salary:
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • Ability to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • Provide proof of country of citizenship or proof of US residency or other protected status for export control assessment
  • Bachelor of Science in Electrical or Computer Engineering
  • 8+ years of experience in RTL design and design checks (CDC/RDC/VCLP/LINT)
  • 8+ years of experience in Synthesis, Timing constraints and Power Performance Area (PPA) trade-offs
  • Proficiency in RTL to Physical Design collateral development including timing and synthesis constraints
  • Knowledge of full RTL2GDS flow
  • Hands-on experience with industry tools for synthesis, STA, and PD flows (e.g., PrimeTime, Genus/DC, Innovus/ICC2)
Job Responsibility
Job Responsibility
  • Serve as the middle-engineering technical leader at the intersection of RTL, physical design, and mixed-signal integration for Azure’s custom silicon programs
  • Ensure that design intent—digital and mixed-signal—is captured accurately in constraints, flows, and sign-off methodologies
  • Lead the capture and validation of design intent for digital and mixed-signal blocks, ensuring accurate constraints and seamless integration across front-end and physical design flows
  • Provide static timing leadership for mixed-signal interfaces, driving timing closure, exception quality, and correlation across corners
  • Partner closely with RTL, PD, mixed-signal, DFT, and CAD teams to resolve cross-domain issues and maintain alignment on timing, power, and functional requirements
  • Run, review and debug physical design flows, timing reports, ensuring consistency with synthesis and STA assumptions and driving convergence through targeted mitigations
  • Contribute to design automation including leveraging AI, constraint-checking, and flow improvements that enhance execution efficiency and PPA
  • Operate with limited direction, demonstrating strong ownership, attention to detail, and the ability to communicate clear, data-driven status, risks, and mitigation plans to program leadership
  • Fulltime
Read More
Arrow Right

Principal Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Raleigh
Salary
Salary:
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • This role will require access to information that is controlled for export under export control regulations
  • As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status
  • To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport
Job Responsibility
Job Responsibility
  • Own or lead verification of major functionality in Accelerator Ips
  • Gain expertise on design functionality and interact with partner teams to define verification strategy and test plans
  • Develop UVM-based verification environments, run and debug tests to drive design quality
  • Apply constrained random stimulus and coverage-based techniques to validate the design and meet test plan goals
  • Innovation to improve verification efficiency through methodologies or tools
  • Apply industry leading generative AI solutions to improve DV quality and efficiency
  • Coach and Mentor team members in your areas of expertise
  • Demonstrate Microsoft Core Values: Customer Focus, Adaptability, Collaboration, Growth Mindset and Drive for Results
  • Fulltime
Read More
Arrow Right

Principal Silicon Engineer - Networking

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Santa Clara
Salary
Salary:
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • This role will require access to information that is controlled for export under export control regulations
  • As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status
  • To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport
  • Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable
Job Responsibility
Job Responsibility
  • Responsible for front end Micro-architecture and RTL implementation of networking accelerator modules to solve complex problems in a datacenter
  • Interact with the software team to co-develop programmable design implementation, verification, and modeling strategies
  • Fulltime
Read More
Arrow Right

Principal Verification Engineer

Microsoft is a highly innovative company that collaborates across disciplines to...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 12+ more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s
  • Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++
  • Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
  • Scripting language such as Python or Perl
Job Responsibility
Job Responsibility
  • Own or lead verification of complex flows at the SOC, subsystem, or IP levels
  • Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • innovate to improve verification efficiency through methodologies or tools
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right