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Microsoft Corporation Logo Microsoft Corporation · IT - Software Development

Principal Signal and Power Integrity Engineer

United States, Raleigh Employment contract 142800.00 - 274800.00 USD / Year · Job Posted June 10, 2026
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Job Description

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Signal and Power Integrity Team team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.

Job Responsibility

  • PI engineer for compute and AI SoCs and platforms – Implement strategies for end-to-end power delivery design from Silicon to Package, and linking to Platform to System and Cloud
  • Deliver SIPI solutions that meet the HPC demands across the entire system
  • Drive future power delivery solutions for chiplet architecture with advanced packaging and advanced silicon nodes
  • Design, model, and simulate PI (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance. Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon
  • Work closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers
  • Drives the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry practices, and lessons learned from teams working across multiple product lines
  • Drives engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.

Nice to have

  • MSEE degree with 10 years' experience in silicon packaging products development
  • Experience with power integrity modelling for HPC products
  • Strong foundation in advanced packaging technologies as it relates Power integrity
  • Experience with Foundry Silicon technologies, OSAT technologies and Substrate technologies
  • MS degree with minimum 7+ years of experience in silicon/package/system power integrity/delivery
  • BSEE degree with minimum 10 years' experience in silicon/package/system power integrity/delivery
  • Experienced in the field of Power Integrity and delivery, System design, IP design with knowledge on product development with minimum 7 years' experience in design and electrical modelling
  • Good working knowledge in the field of end to end system SIPI Design and Architecture
  • Industry knowledge, trends and landscape of technologies to drive development across Silicon-IP, Advanced packaging, Substrate technology, Board technology and Platform design
  • Interpersonal skills including written and verbal communication, teamwork, negotiation, and presentation
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