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Principal Quantum Analog Design Lead

United States, Redmond Employment contract 139900.00 - 274800.00 USD / Year · Job Posted May 17, 2026
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Job Description

As a Principal Quantum Analog Design Lead in the Quantum 1st Party Hardware Application-Specific Integrated Circuit (ASIC) team, you will play a critical leadership role in advancing the development of the team's quantum Analog infrastructure. Your responsibilities will include defining System-on-a-Chip (SoC) and Intellectual Property (IP) microarchitecture specifications, and coordinating individuals, contingent staff, and external vendors to deliver a high-quality design. You will work across SoC architecture, quantum hardware, verification, and physical design teams throughout the program lifecycle to bring SoC and IP into production at the quality required for scalable quantum systems.

Job Responsibility

  • Coordinate interactions with Quantum Qubit design and Measurement teams to define specifications, architecture, and micro-architecture for Analog IP blocks
  • Own and drive the development of analog IP, including microarchitecture, schematic entry, and verification of complex blocks to meet stringent power, performance, and timing goals
  • Create test plans for verification and post-silicon validation and characterization
  • Design and validate analog blocks in simulation, both pre- and post-layout
  • Drive design reviews, status reports, and schedules to deliver against internal end-to-end milestone quality
  • Coordinate the work of other Analog Designers and Verification teams, audit their output, and provide guidance and direction to deliver high-quality results
  • Develop basic test benches and support verification, Design For Test (DFT), and post-silicon validation activities
  • Collaborate effectively with architects, analog mixed-signal designers, verification engineers, and physical design, DFT, and other front-end design teams
  • Align development methodologies with wider teams and drive continuous improvement to Analog Design Flow and development processes for at-scale execution

Requirements

  • Doctorate in Physics, Engineering, or related field AND 3+ years experience in industry or in a research and development environment
  • OR Master's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
  • OR Bachelor's Degree in Physics, Engineering, or related field AND 8+ years experience in industry or in a research and development environment
  • OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role
  • Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations
  • Ability to leverage AI tools to drive innovation and efficiency
  • Ability to work in an AI-first environment using modern AI tools to accelerate discovery through hardware development

Nice to have

  • 12+ years of experience in custom analog and mixed-signal Integrated Circuit (IC) design
  • 10+ years of experience owning and driving large analog and mixed-signal Intellectual Property (IP) teams to successful delivery into production
  • Experience with high-speed and/or low-noise analog front-end design on IP blocks such as Analog-to-Digital and Digital-to-Analog Converters (ADCs/DACs), Phase-Locked Loops (PLLs), regulators, bandgap references, and Serializer/Deserializers (SerDes)
  • Proficiency in analog design flows and industry-standard tooling for circuit schematic entry, simulations, post-layout extractions, and mixed-mode simulations
  • Experience with Analog Mixed-Signal (AMS) simulation across the design lifecycle
  • Experience coordinating work with contractors and vendors to execute analog and mixed-signal IP delivery
  • Experience working with multiple stakeholders across architecture, design, layout, and silicon validation teams
  • Proficiency in MATLAB for complex modeling and visualization
  • Proficiency in scripting languages such as Python and Perl

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