Principal FPGA / RTL Design Engineer Job at Silvus Technologies (International) (Irvine)

Principal FPGA / RTL Design Engineer - Signal Processing

Participate in all aspects of the research and development process from concept ...

Location

United States , Los Angeles

Salary:

165000.00 - 250000.00 USD / Year

Silvus Technologies (International)

Expiration Date

Until further notice

Requirements

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields
Minimum 10 years of demonstrated experience in RTL design and FPGA implementation
8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields
Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs
Deep knowledge of RTL design fundamentals using Verilog and System-Verilog
Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs
Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
Must be U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts
All employment is contingent upon the successful clearance of a background check

Job Responsibility

Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks
RTL coding, simulation, and test bench development
FPGA synthesis and timing closure
Hardware verification and troubleshooting
familiarity with logic analyzers
Provide support to the RF and Software Engineering Teams

Fulltime

Principal FPGA / RTL Design Engineer - Signal Processing

Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who ...

Location

United States , Irvine

Salary:

165000.00 - 250000.00 USD / Year

Silvus Technologies (International)

Expiration Date

Until further notice

Requirements

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields
Minimum 10 years of demonstrated experience in RTL design and FPGA implementation
8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields
Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs
Deep knowledge of RTL design fundamentals using Verilog and System-Verilog
Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs
Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
Must be a U.S. Citizen due to clients under U.S. government contracts
All employment is contingent upon the successful clearance of a background check

Job Responsibility

Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks
RTL coding, simulation, and test bench development
FPGA synthesis and timing closure
Hardware verification and troubleshooting
familiarity with logic analyzers
Provide support to the RF and Software Engineering teams

Fulltime

Senior FPGA Architect / Principal FPGA Engineer

Senior FPGA Architect / Principal FPGA Engineer – Real-Time Processing Systems

Location

Canada , Ottawa

Salary:

Not provided

Myticas Consulting

Expiration Date

Until further notice

Requirements

Architect-level FPGA expertise designing high-performance real-time processing systems and complex programmable logic architectures
Advanced RTL development using Verilog / SystemVerilog for high-throughput pipelines, accelerators, and timing-sensitive hardware logic
Experience building FPGA-based SoC architectures including AXI/Avalon fabrics, DMA engines, memory controllers, and multi-clock domain designs
Strong background in high-bandwidth data-path design, resource utilization optimization, timing feasibility, and device architecture trade-offs
Hands-on expertise with Xilinx UltraScale+/MPSoC and/or Intel FPGA families (Arria, Stratix, Agilex) and associated development toolchains
Deep experience integrating high-speed interfaces such as PCIe, Ethernet, and high-speed serial transceivers (SERDES)
Familiarity with video/media transport or other latency-sensitive real-time processing environments involving high data throughput
Proven ability to drive timing closure, synthesis, floorplanning, constraint management, and place-and-route optimization
Strong verification leadership including simulation-driven validation, UVM environments, constrained-random testing, and coverage-driven methodologies
Practical lab experience performing FPGA bring-up, system integration, and hardware debug using scopes, logic analyzers, and embedded debug tools

Fulltime

New

Principal FPGA Design Engineer - 4G/5G Radio Systems

Are you a FPGA Design Engineer looking for a new opportunity? Are you looking fo...

Location

Canada , Kanata

Salary:

62.19 - 72.43 USD / Hour

Randstad

Expiration Date

June 29, 2026

Requirements

7+ Years of RTL Expertise: Proven track record in high-complexity FPGA design, specifically using SystemVerilog or Verilog. (Note: Candidate must be willing to work exclusively in a non-VHDL environment).
Altera/Intel Toolchain: Mastery of Quartus Prime for synthesis, place-and-route, and timing closure on high-density FPGAs.
DSP Modeling: Proficiency in MATLAB and Simulink for algorithmic modeling and fixed-point simulation prior to RTL implementation.
Protocol Mastery: Deep expertise in AXI (AXI4-Stream, AXI4-Lite) and Ethernet (10G/25G/100G) protocol implementation.
High Speed Interfaces: Practical experience with JESD204B/C, PCIe, and multi-gigabit SERDES transceivers.
Synchronization: Understanding of timing and synchronization protocols, such as PTP (IEEE 1588) and SyncE.
Wireless Infrastructure: Direct experience developing Radio Units (RU) or Massive MIMO systems.
Industry Standards: Functional knowledge of 3GPP physical layer specifications and O-RAN (Open RAN) Fronthaul interfaces (eCPRI/CPRI).
Signal Processing: Experience implementing Digital Up/Down Conversion (DUC/DDC), Crest Factor Reduction (CFR), or Digital Pre-Distortion (DPD) in hardware.
Advanced Verification: Experience with UVM (Universal Verification Methodology) and constrained-random testing to ensure 'first-time-right' silicon/FPGA bitstreams.

Job Responsibility

Define System Requirements: Translate high-level customer needs and 3GPP/O-RAN standards into detailed functional specifications for the entire FPGA ecosystem.
Drive 5G Roadmap: Architect FPGA IP specifically for 4G/5G Radio Units, ensuring designs align with industry trends and long-term organizational strategy.
Strategic Design Choices: Set the standard for product excellence by selecting optimal components and design methodologies to meet aggressive cost and performance targets.
High-Complexity RTL Development: Lead the implementation of complex logic blocks using SystemVerilog, focusing on high-speed Ethernet and AXI protocol integration.
Model-Based Design: Utilize MATLAB and Simulink to model signal processing algorithms before translating them into hardware-efficient RTL.
Ensure Design Integrity: Oversee the full validation lifecycle, from UVM-based simulation to hands-on system-level testing and timing closure using Altera Quartus.
Hardware-Software Synergy: Partner closely with software and RF teams to ensure seamless interoperability between hardware logic and low-level software drivers.
Technical Authority: Act as the primary consultant on critical, high-impact projects, providing 'whiteboard-level' solutions to unusually complex engineering hurdles.
Team Mentorship: Provide technical guidance to junior engineers, fostering a culture of best practices in RTL coding and version control (Git).
Executive Communication: Bridge the gap between engineering and management by communicating project progress, risks, and technical visions to senior leadership.

Fulltime

Principal Quantum Systems Digital Design Engineer

Microsoft is the world’s center of expertise on topological quantum computing. W...

Location

United States , Redmond

Salary:

139900.00 - 274800.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Physics, Electrical/Computer Engineering, or related field AND 3+ years experience in industry or in a research and development environment
OR Master's Degree in Physics, Electrical/Computer Engineering, or related field AND 4+ years experience in industry or in a research and development environment
OR Bachelor's Degree in Physics, Electrical/Computer Engineering, or related field AND 6+ years experience in industry or in a research and development environment
OR equivalent experience
6+ years programming experience in related programming languages
6+ years experience in a collaborative environment
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role
Ability to work in an "AI first" environment using modern AI tools to accelerate discovery through hardware development
Familiarity with designing and building AI agents/copilots that assist with experiment setup, log triage, measurement report generation, protocol templating, and knowledge retrieval

Job Responsibility

Design & implement RTL for streaming, low‑latency pipelines (e.g., readout classifiers, syndrome aggregation, and QEC decoder kernels) in Verilog/SystemVerilog, including resource/performance trade‑offs and power/thermal considerations
Design and implement high‑speed interconnects between subsystems (AXI4/AXI‑Stream, JESD204(B/C), Aurora, Ethernet/UDP, PCIe), including SERDES configuration, link bring‑up, and throughput/latency tuning
Design robust clocking & CDC strategies (MMCM/PLL trees, jitter budgets, multi‑domain timing closure, async FIFOs, metastability analysis) for deterministic performance
Co‑design hardware/firmware/software boundaries (register maps, DMA, interrupt models, driver interfaces) with control/readout software and instrument teams
contribute to system‑level design reviews
Verification and validation: develop simulation and constrained‑random tests (SV/UVM or equivalent), build on‑board diagnostics (ILA/ChipScope), and execute lab bring‑up with scopes, VNAs, LA/SC, and RF instruments
Tool flow & CI: own synthesis/implementation (Vivado/Vitis or Quartus/Prime), timing sign‑off, and reproducible, scripted builds (Tcl/Python) integrated with Git/Azure DevOps CI/CD
Quality & documentation: produce clear design docs, interface specs, and bring‑up guides
participate in rigorous code/design reviews and post‑silicon/post‑fabrication retros

Fulltime

New

Primary Care Physician

We're building a world of health around every individual — shaping a more connec...

Location

United States , St. Louis

Salary:

245000.00 - 270000.00 USD / Year

CVS Health

Expiration Date

Until further notice

Requirements

Medical Doctor (M.D.) or Doctor of Osteopathy (D.O.) Graduate
Internal Medicine or Family Medicine Board Certification (Or board eligible)
Active, non-probationary, unrestricted State License
Active DEA license
US work authorization

Job Responsibility

Assess and diagnose patients at our local clinics
Oversee, direct, and administer primary care
Prescribe and administer pharmaceutical treatments and medication
Maintain Patient Electronic Medical Record data via canopy and greenway
Collaborate with regional and central leadership to meet health quality goals
Work with Practice Managers to direct and manage the center care team
Other duties as assigned

What we offer

medical
dental
vision coverage
paid time off
retirement savings options
wellness programs

Fulltime

New

Bartender

This position is dedicated to providing exceptional quality service to our guest...

Location

United States of America , Naples

Salary:

Not provided

Four Seasons

Expiration Date

Until further notice

Requirements

2+ years of bartending experience, preferably within a luxury hotel and/or high-end bar environment
Working knowledge of Micros POS system is beneficial
Strong interpersonal and personal presentation skills required
Guest-focused mentality and understanding the importance of guest's preferences
The ideal candidate will have a confident, outgoing personality and a can-do approach to any request
Position requires continuous standing for 8 or more hours a day and requires the ability to lift up to 50lbs
Fluency in English is required for this location and this job requires applicants to have current work authorization in the United States

Job Responsibility

Provide knowledge of wines, spirits and mixed drinks including origin, taste, and preparation methods
maintain a working knowledge of wine list, classic cocktail recipes and specialty drinks
Provide quick and efficient beverage service, proper pouring and mixing according to established recipes while following state and city alcohol laws and adhering to Four Seasons standards of service and sequence of service
Confirm guest orders including any special needs or requests from the Servers using the resort's point-of-sales system
check completed orders with the guest's original order
anticipate guest needs, ascertain satisfaction, and offer suggestions
Handle any requests in a courteous and efficient manner, responding urgently and appropriately to guest concerns and requests
Assist in drink development, promotions/special events, product inventory, process log entries for voids and spillage, cut and prepare fruits and other beverage garnishments, and any other related task
Follow bar P&Ps and daily checklists
Be present and ensure that professional, courteous, and efficient guest service is offered, where each guest is greeted promptly and courteously with eye contact and a smile

What we offer

Competitive wages and a comprehensive benefits package
Market-leading benefits package includes: Medical, Dental, Vision, and 401K with employer match all starting at 30 days
Paid Time Off plans start on the day of hire
Employee Cafeteria available for meals
Discounted travel with discounted F&B and Spa Services at Four Seasons Hotels and Resorts Worldwide
Tuition reimbursement
An opportunity to be a part of a cohesive team in an inclusive work environment
Wellbeing and mental health initiatives and focused company
Embracement and promotion of diversity in our workplace

Fulltime

New

Assistant Food & Beverage Manager

The Assistant Food & Beverage Manager helps oversee daily operations across all ...

Location

United States of America , Lana'i city, Hawaii

Salary:

75000.00 - 78000.00 USD / Year

Four Seasons

Expiration Date

Until further notice

Requirements

Must possess legal work authorization in United States (unless the candidate is currently in a managerial position at another Four Seasons location as they may qualify for a L-1 Visa sponsorship)
The hospitality business functions seven (7) days a week, twenty-four (24) hours a day and scheduled days and times may vary based on need. Holidays and weekends availability is required.
Required by the Hawaii State Department of Health to obtain a Tuberculous (TB) clearance card
Hawaii Food Handler’s Card and Hawaii Maui County Liquor Card is required for this role
Ability to stand for extended periods, lift up to 50 lbs, and push/pull as needed during shifts
Prior experience in supervisory roles within luxury Food & Beverage or full‑service restaurant operations, preferably in high‑volume, fine‑dining, or all‑day dining environments.

Job Responsibility

Supervise and lead Food & Beverage teams across all outlets by interviewing, training, mentoring, and coaching team members to ensure adherence to established cultural values and core service standards
Support daily operations by maintaining a strong, visible presence on the floor and ensuring exceptional guest experiences and consistent service standards
Engage with guests to build relationships with new and returning patrons, addressing complaints, concerns, and special requests to maintain high satisfaction levels
Monitor the condition of facilities and equipment, recommending improvements to uphold quality and safety standards
Collaborate with Culinary and Front‑of‑House leadership to update menus and develop special offerings
Ensure compliance with company policies and all health, safety, and regulatory requirements
Manage labor and operational expenses through effective scheduling, budgeting, purchasing, inventory control, and cost‑control practices
Communicate effectively with employees and management to meet operational needs and ensure strong coordination between front‑of‑house and back‑of‑house teams
Participate in regular operational meetings and promote proactive cross‑department communication to support seamless and efficient operations

What we offer

100% Employer contributed Medical, Dental, and Vision benefits
Competitive wages and other benefits (Retirement Plan, Wellness Credit, Travel Credit) as well as Paid Time Off & Holiday Pay
Inclusive and diverse employee engagement & recognition events all year-round
Complimentary stays and exclusive discounts at Four Seasons Worldwide
Complimentary Employee Meals & Dry Cleaning for Employee Uniforms
Owner subsidized on-island housing, inter-island airfare to Oahu and other resources
Comprehensive learning and development programs to help you master your craft
Energizing Employee Culture where you are encouraged to be your true self!

Fulltime

Principal FPGA / RTL Design Engineer

Silvus Technologies (International)

Location:
United States , Irvine

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Nice to have:

Additional Information:

Job Posted:
December 12, 2025

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