Principal FPGA / RTL Design Engineer - Signal Processing Jobs

Silvus Technologies (International)

Location:
United States, Irvine

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

165000.00 - 250000.00 USD / Year

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Job Description:

Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who will report to the Senior Engineering Director in Irvine and work closely with the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects aimed at addressing challenging real-world communication needs.

Job Responsibility:

Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks
RTL coding, simulation, and test bench development
FPGA synthesis and timing closure
Hardware verification and troubleshooting
familiarity with logic analyzers
Provide support to the RF and Software Engineering teams

Requirements:

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields
Minimum 10 years of demonstrated experience in RTL design and FPGA implementation
8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields
Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs
Deep knowledge of RTL design fundamentals using Verilog and System-Verilog
Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs
Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
Must be a U.S. Citizen due to clients under U.S. government contracts
All employment is contingent upon the successful clearance of a background check

Nice to have:

M.S. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant fields
Basic MATLAB skills
Solid knowledge and understanding of scripting languages such as Perl and Python
Strong communication and presentation skills
Experience with wireless communication systems on FPGA or ASIC designs

Additional Information:

Job Posted:
December 12, 2025

Employment Type:

Fulltime

Work Type:

Hybrid work

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Principal FPGA / RTL Design Engineer - Signal Processing