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Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Principal Circuit Design Engineer to help achieve that mission. As Microsoft's cloud business continues to grow, the ability to deploy offerings and hardware infrastructure on time with high quality and low cost is of paramount importance. To achieve this goal, the Custom IP team works with architects, technologists, and design engineers to define and deliver differentiating custom IPs which bring high power, performance, and area advantages to the Azure Cloud. We are looking for a Principal Circuit Design Engineer with a passion for envisioning and creating complex technical IPs and solutions in conjunction with our SoC partners.
Job Responsibility
Collaborate with SoC designers to develop Memory SRAM and Register file solutions to difficult PPA challenges
Work with internal and external process technology teams to understand and exploit advanced process DTCO knobs
Devise methodologies for statistical analysis and timing/power/EMIR characterization
Run quality assurance checks on IP collateral
Develop IP and post-silicon characterization plans for inclusion on advanced process technology testchips
Develop scripting automation for flows
Requirements
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
Nice to have
6+ years of experience in SRAM or Register file design
6+ years of experience in timing, power, EMIR characterization
Experience in SRAM and Register File design in advanced process technologies
Understanding of SRAM write and read assist techniques
Understanding of process technology and DTCO
Understanding of layout and provide guidance to layout design
Experience in yield and reliability
Experience in providing technical guidance to other engineers and multitasking across multiple SoC programs
Scripting experience in PERL, Python, or TCL
Working knowledge of and experience in utilizing AI for circuit design tasks
Ability to concisely communicate design value propositions and risks