Power Attainment System Lead

• Derive and maintain Vmin vs. frequency curves and voltage/frequency (V/F) characterization across process corners, temperatures and aging
• incorporate PVT and per-core/cluster binning into static tables and/or online calibration
• Implement, tune and validate frequency attainment mechanisms (Vmin tuning algorithms, adaptive voltage scaling, SVID/PMIC controls, fmax governors) to reliably reach target frequencies without functional failures
• Plan and execute silicon bring-up and lab validation: ring/logic/GPU stress tests, frequency and voltage sweeps, margining, jitter and timing closure verification across PVT corners
• Characterize transient and steady-state voltage requirements, set ramp rates, slew limits and decoupling recommendations with PMIC/PD teams to prevent droops during frequency switches and DVFS events
• Define and run automated stability and regression suites (workloads, power-stage transients, fast frequency scaling) to detect undervoltage faults, brownouts and performance regressions
• Develop and validate safe operating points, watchdogs and fallback strategies (hold states, throttling, core isolation) to protect hardware when Vmin or other limits are violated
• Perform failure analysis and root-cause debugging for frequency attainment and stability issues using telemetry, logs, silicon probes and logic analyzers (timing violations, crashes, ECC events)
• Account for variability and telemetry: temperature sensors, aging compensation, per-core/cluster calibration, and adapt Vmin/runtime policies accordingly
• Collaborate cross-functionally with silicon validation, firmware/bootloader, PMIC/PMU, power delivery and system software to integrate Vmin tables, calibration data and runtime tuning hooks into firmware and OS power managers
• Support prototyping and experiments for features affecting GPU/APU and system-level power/performance
• exploit architecture bottlenecks to test and mitigate worst-case scenarios
• Characterize product KPIs and analyze characterization data for process variation to inform product definition and next-generation design trade-offs
• Troubleshoot system-level issues on test and customer platforms, drive continuous improvement for post-silicon power/performance activities, and participate in product definition reviews and launch handover Document Vmin methodology, calibration procedures, limits, release notes and provide operational guidance for manufacturing test, bring-up and field support

• Excellent grasp of computer organization/architecture
• Strong understanding of transistor operation and physics
• Strong programming skills, experience in Python preferred
• Desirable to be proficient in Linux command line environment and Shell scripting
• Deep knowledge of power management techniques like deep sleep and clock gating
• Strong analytical and problem-solving skills with a key attention to detail
• Excellent presentation and communication skills
• Proficient in using lab equipment like oscilloscopes and power supplies

• experience in Python preferred
• Linux command line environment and Shell scripting

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