Post Silicon Power And Performance Validation Senior Engineer Job at AMD (Penang)

Senior Member of Technical Staff (MTS) – Post‑Silicon SoC & System‑Level Validation Engineer

This role focuses on validating end‑to‑end system behavior, ensuring that multip...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

12+ years of experience in pre‑silicon and/or post‑silicon SoC validation, with strong ownership in post‑silicon execution
Strong understanding of SoC architecture and subsystem interactions
Experience validating system‑level use cases and customer‑driven scenarios
Familiarity with debug tools, system logs, traces, and lab‑based validation setups
Strong understanding of SoC boot flows, firmware, and HW/SW interaction
Lab proficiency: Extensive experience using lab equipment such as oscilloscopes, protocol analyzers, signal generators, etc.

Job Responsibility

Own SoC‑level post‑silicon validation, focusing on interaction between multiple subsystems rather than isolated IP testing
Validate end‑to‑end system flows involving CPU cores, on‑chip memories, NoC/interconnect, IOs, power management, and firmware
Ensure correct behavior across boot, runtime, stress, error, and recovery scenarios at the SoC level
Develop validation test cases based on customer use cases (boot flows, IO usage, stress, concurrency, power transitions) into executable validation plans
Debug & root cause analysis: Perform deep SoC‑level debug to isolate failures across hardware, firmware, and system software boundaries
Lab execution & characterization: Use engineering lab equipment (oscilloscopes, protocol analyzers, signal generators, etc.) to validate and debug functional behavior
Documentation & reporting: Produce clear test plans, execution reports, failure analysis summaries, and status updates
track bugs/issues to closure

What we offer

AMD benefits at a glance

Fulltime

Post Silicon Validation Manager

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Highly skilled engineering professional with over 15 years of experience
Solid experience in handling high performing, dynamic and a strong technical team
Solid Experience and Knowledge in the post silicon validation of x86 IPs like Cores, Memory, RAS, HSIO
Solid experience in handling the growth charter for growing teams and embrace changes with ease and grace
Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans
Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution
Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW
Experience in High Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects
Experience in Power Management, Power Delivery, and Power Measurements
Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc

Job Responsibility

Take responsibility for the Post silicon validation scope and plan for IPs like HSIO, Memory, RAS, Cores, LSIO, Power Management, Multimedia etc
Ensure robust planning at the pre-silicon stage, working with DV or Emulation teams and support the Leads and engineers in framing the relevant test cases
Support the team with the right infrastructure at the right time
Define the scaling of the teams for Capability and Capacity in line with the BU’s growth
Bigger picture planning for roadmaps and process improvements
Create a cohesive culture of openness, diversity, technical growth for the team members
Act with great resolve during testing times of critical issues, milestones, customer escalations and BU related internal changes
Exhibit strong leadership qualities to take the team forward towards growth and achieving the mission of the company
Exhibit great technical depth in the post silicon validation to take the right technical decisions for the team
Ensuring the team delivers error free and timely delivery of test cases and test reports, meeting or beating the program commitment

Fulltime

Senior SoC HW (Functional) Validation Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Hillsboro

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role
Applied understanding of Computer Architecture and CPU/SoC validation principles, including: Understanding of SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++
At least 5+ years of experience
Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams
Verification, logic development, validation, or validation tools experience as part of a CPU, SoC and/or IP development team
Leadership skills
Demonstrated validation expertise in one or more of the following: Functional: Core, cache Coherency/mesh/fabric, PCIe/ IO, Memory Controller, Power Management
Power and Performance
Automation, Content Creation, or Tools/Scripts Development

Job Responsibility

Own post-silicon validation of one of the following areas – functional validation of cache Coherency/mesh/fabric
Define, guide, and contribute to the implementation of silicon debug tools and capabilities
Become an expert on the overall architecture, implementation of complex features/flows/protocols, and their interactions with other parts of the SoC, with the platform, and with software
Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements
Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools and other validation collateral
Execute content in post-silicon, triage and debug failures
Apply your growth mindset to learn and adapt in a complex and dynamic environment
Engage with partners to drive continuous improvement to the design, to validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers

Fulltime

Senior Engineer, ASIC Development Engineering

As a SoC Validation/Verification Engineer, you will play a key role in ensuring ...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BE or MS degree in Electrical Engineering or Computer Engineering
4-6 years of experience in SoC pre-/post-silicon verification and validation, and bring-up
Deep understanding of C, embedded programming, and hardware/software co-validation methodologies
Strong knowledge of SoC verification environments, SystemVerilog (SV), and UVM concepts
Proven history of developing and executing verification and validation strategies for complex SoCs
Experience in verification and validation of industry-standard protocols such as DDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, and APB
Run complex SoC verification and validation scenarios on Palladium/Emulation platforms
Must understand and contribute to complex SoC-level testbenches, including UVM, C, and SystemVerilog components
Execute verification and validation cases in simulation environments and perform initial debug and root cause analysis
Strong experience in bring-up, including board initialization, power-on sequences, processor boot, and system-level debug for both pre- and post-silicon phases

Job Responsibility

Understanding complex ASIC specifications to create comprehensive Verification/Validation plans for both pre- and post-silicon validation
Independently developing and executing tests for verification and validation
Collaborating with cross-functional teams to drive closure of verification and validation activities
Signing off on verification and validation deliverables
Debugging and root cause analysis of issues found during validation
Developing and maintaining automated test environments and regression suites
Contributing to the continuous improvement of verification methodologies and best practices
End-to-end ownership of one or more subsystems or SoC verification and validation flows, including planning, execution, and closure

Fulltime

Senior Analog Design Engineer

The Interface & Custom Circuit Engineering team in AI-Silicon Engineering is see...

Location

India , Bangalore

Salary:

Not provided

Microsoft Corporation

Expiration Date

Until further notice

Requirements

BSEE or equivalent, MSEE/PhD preferred
7+ years of experience in analog circuit design, through full cycle post BSEE or equivalent
Experience with high-speed analog front-end serdes or D2D design (preferably PCIe, UCIe, D-PHY, USB), data-converters, PLLs, Regulators and all associated blocks in analog designs from architecture till silicon validation support
Experience in Design partitioning, power/jitter budgeting and timing analysis
Knowledge of lower power design techniques, calibration, parasitic extraction, EM/IR/ESD/Aging & Signal Integrity Design
Experience with the use of CAD-tools (Cadence, Mentor, Synopsys) for circuit schematic entry, simulations, post layout extractions, Mixed-mode simulations
Delivered Analog IP’s successfully in mass production in FinFET processes
Experience in mentoring individual engineers
Working with multiple stakeholders (arch/design/layout/silicon validation/project managers) to execute full design cycle till silicon
Excellent communication skills and self-motivated that can collaborate with larger teams within Microsoft

Job Responsibility

Lead Analog designs and delivery of cutting edge, high-performance, high-speed, low-power Analog IP designs for interconnectivity solutions and fundamental Analog circuit blocks for various Microsoft products in various process nodes including deep FinFet, following industry best practices
Technically deliver complex blocks that will produce schematics, verify in simulation, complete timing/jitter/power budgets and work with mask layout teams to deliver a final IP GDS
Coordinate tasks with junior members of the team, develop plans for Analog IP execution, follow processes/methodologies to deliver IP blocks
Coordinate bench validation of IP in Silicon, and IP characterization on bench and tester
Use established flows/methodologies/processes for execution
Work along with other members of the team to deliver IP’s, including project planning, schedule tracking, report generation
Interface with RTL, Verification and P&R team

Fulltime

Technical Program Manager - SOC

As a Technical Program Manager in AMD's Networking technology and solutions grou...

Location

United States , Santa Clara

Salary:

182320.00 - 273480.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Computer/Electrical Engineering
Familiarity with silicon design process
Experience in silicon design, verification, validation development preferred
Excellent presentation and leadership skills
Strong interpersonal skills
Exceptional written and verbal communication skills
Experience leading complex, interrelated projects, programs, and functions
Outstanding team player
Proficiency in tools like JIRA, Confluence, SharePoint, Excel and MS Office
Experience collaborating with globally distributed teams

Job Responsibility

Collaborate with engineering managers, ASIC/hardware/software developers, and product managers to drive the planning and execution of multiple dynamic silicon development projects
Define, plan, and execute projects and program plans based on management guidance and senior technical mentorship
Assess the technical feasibility of new products by clarifying and analyzing requirements with software/hardware architects, technical leads, and engineers
Develop program schedules, considering various silicon development process and hardware/firmware dependencies, and build staffing plans to support the timeline
Participate in creating project plans and schedules
develop and improve processes for tracking projects and risk mitigation
Deliver on all assigned program commitments from inception through execution within schedule, budget, and scope
Act as a critical liaison between R&D and other partners for successful project execution
Own resource tracking, status reporting, and issue communication to key partners, including senior executives and customers
Prepare and deliver project status updates and reviews to internal stakeholders

Senior Manager Product Development Engineering - ATE Test Solutions

We are the high-end test engineering team providing test solutions for Data Cent...

Location

Singapore , Singapore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Strong technical, analytical, leadership and problem-solving skills
Independent and resourceful individual
Proficient understanding of DFT(Design-For-Test) architecture for SOC (System-On-Chip) product
Strong test development, Silicon characterization/debug working experience various industry standard ATE test platforms
Data analysis
Good understanding of power and performance characterization on ATE
ATE Test handling/ execution and development experience - Advantest V93K experience preferred (Advantest SMT8 experience is a plus)
Software programming and scripting proficiency (C++, Java, Groovy, Perl, Ruby, Python)
Proficiency in Windows and Linux operating systems
Experience with HVM (High Volume Manufacturing) is a strong plus

Job Responsibility

Accountable to drive test solution/coverage development, optimization to meet business milestone, cost and quality
ATE Test patterns & test flows/method development, debug, test and characterization
Pre-Silicon engagement with Design, test solution/methodology scoping, planning & validation
Post Silicon Bring up of test patterns leading to optimization for mass production enablement
Characterization execution/analysis and debug of new silicon designs and process technologies
Optimization of test coverage and flows for increased quality, yield, cost improvement, and test time reduction
Conduct engineering evaluations and analysis to drive closure of production issues
Solves complex, novel, and non-recurring problems
initiate significant changes to existing processes/methods and leads development and implementation
Influences technical decisions that have a significant impact on final product

New

Software Engineer, Analytics

We are looking for a Software Engineer, Analytics to work on our cloud operation...

Location

Finland , Helsinki

Salary:

Not provided

Aiven Deutschland GmbH

Expiration Date

Until further notice

Requirements

Excellent development skills in Python
3+ years of experience working with one of these databases - PostgreSQL, MySQL, MariaDB, SQL Server, OracleDB
Experience in data engineering, including building ETL pipelines and working with large-scale datasets
Good understanding of data modeling, schema design, and query optimization
Knowledge of backup solutions and backup strategies
Good understanding of Linux OS
Experience with automated testing
Distributed systems knowledge
Experience with performance improvements, bug fixes, and security vulnerability resolution
Fluency in English, verbal and written

Job Responsibility

Write high-quality, maintainable code and release quality features
Participate in technical discussions and perform PR reviews
Optimize data storage and query performance for both OLTP (PostgreSQL) and OLAP workloads
Contribute to technical planning and backlog management
Help investigate and resolve customer issues
Mentor and empower other engineers
Automate processes to eliminate repetitive manual work
Develop and improve the scalability and reliability of PostgreSQL service

What we offer

Participate in Aiven’s equity plan
Balance work and life with our hybrid work policy
Choose the equipment you need to set yourself up for success
Use your Professional Development Plan budget for learning opportunities
Receive holistic wellbeing support through our global Employee Assistance Program
Inquire about our Global Time Off Commitment (Parental and Sick Leave, as well as Personal Time)
Enjoy country-specific benefits for our global cast

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Post Silicon Power And Performance Validation Senior Engineer

Job Description

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