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As a Physical Design intern, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions.
Job Responsibility:
Realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff
Assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions
Requirements:
Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field
Familiarity with high-speed digital logic
Exposure to ASIC or SoC design concepts
Familiarity with SystemVerilog, UVM, or Python
Familiarity with verification work and writing test benches
Familiarity with physical design flows and tooling
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Nice to have:
Familiarity with transformer models and machine learning
Familiarity with numerical representations and functions (RTL)
Familiarity with clocking and reset schemes (RTL/PD)
UVM or formal verification experience (DV)
Ability to program with Python or another scripting language
What we offer:
12-week paid internship (June - August 2026)
Generous housing support for those relocating
Daily lunch and dinner in our office
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time