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Packaging Engineer (Substrate Design and Layout)

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Sandisk

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Location:
Taiwan , Taichung

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Contract Type:
Not provided

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Salary:

Not provided

Job Description:

Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD controllers, NAND BGA, uSD, SD, and USB products. Support the development and integration of advanced packaging technologies, with a focus on standalone ASIC, MCM FCBGA, and 2.5D. Emphasis is placed on interposer/substrate/board co-design, design rule definition, and cross-functional collaboration. Conduct substrate layout feasibility studies, die fitment analysis, and prepare comprehensive design documentation. Maintain and manage design libraries, and generate accurate bonding diagrams to support layout and assembly processes. Collaborate closely with hardware, assembly, and packaging engineering teams across multiple Sandisk sites to enable new product development and continuous substrate design improvement. Interface with assembly houses and substrate vendors to perform design reviews, ensure compliance with design rules, and support manufacturability.

Job Responsibility:

  • Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD controllers, NAND BGA, uSD, SD, and USB products
  • Support the development and integration of advanced packaging technologies, with a focus on standalone ASIC, MCM FCBGA, and 2.5D. Emphasis is placed on interposer/substrate/board co-design, design rule definition, and cross-functional collaboration
  • Conduct substrate layout feasibility studies, die fitment analysis, and prepare comprehensive design documentation
  • Maintain and manage design libraries, and generate accurate bonding diagrams to support layout and assembly processes
  • Collaborate closely with hardware, assembly, and packaging engineering teams across multiple Sandisk sites to enable new product development and continuous substrate design improvement
  • Interface with assembly houses and substrate vendors to perform design reviews, ensure compliance with design rules, and support manufacturability

Requirements:

  • Master’s or Bachelor’s degree in Materials Science, Electrical/Electronics Engineering, or other relevant engineering or science disciplines
  • Up to 2 years of design experience in semiconductor packaging, substrate design, or related fields
  • Familiarity with advanced packaging technologies such as FCBGA, MCM, or 2.5D designs is a plus
  • Strong foundation in design principles, materials, and electrical performance considerations
  • Ability to work collaboratively in cross-functional teams and communicate effectively across disciplines
  • Proficient in EDA tools, including Cadence SIP/Allegro, AutoCAD, CAM, and Valor for substrate and package design
  • Solid understanding of advanced packaging design and manufacturing processes, particularly for flip chip and substrate-based technologies
  • Strong communication and interpersonal skills to effectively collaborate across cross-functional and global teams
  • Familiar with substrate fabrication and manufacturing workflows, including design rule interpretation and vendor engagement

Nice to have:

Familiarity with advanced packaging technologies such as FCBGA, MCM, or 2.5D designs is a plus

Additional Information:

Job Posted:
February 18, 2026

Employment Type:
Fulltime
Work Type:
On-site work
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