Memory Validation Engineer Job at AMD (Austin)

Engineer, Test Engineering

We are seeking a highly skilled and innovative senior engineer to lead our techn...

Location

Malaysia , Batu Kawan, Penang

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelors in Electrical & Electronic Engineering
Deep understanding of SSD or Non-Volatile Memory testing methods, failure mechanism and FA techniques
Basic ability to read, understand and write Python, SQL, C++ and Java
Ability to lead a technical team and work independently
Highly self-motivated, passionate about innovation, and committed to continuous learning
Proven ability to work effectively in a fast-paced environment and consistently meet deadlines
Detail-oriented and capable of managing multiple tasks simultaneously
Excellent communication and collaboration skills
Strong problem-solving and critical thinking skills

Job Responsibility

Optimize Test Strategies: Design and execute efficient test plans, test time, yield, and quality to meet factory financial goals. Identify cost-effective testing methods through troubleshooting, validation, and continuous improvement
Lead and Collaborate on Engineering Solutions: Lead and implement innovative engineering solutions while collaborating with cross-functional teams to ensure project success under competitive timeline
Champion Innovation and Cost Efficiency: Collaboratively integrate advanced testing technologies, research, and adopt cost-saving solutions like Test Time Reduction (TTR) and new test platforms, driving CAPEX reduction. Continuously improve test programs and test infrastructure to enhance product quality and reliability
Technical Expertise and Support: Provide leadership in electrical failure analysis (EFA), exploring new test method/EFA technique to address RMAs, production, reliability, and DPPM improvement. Analyze test results and deliver reports to stakeholders with actionable insights for improvement
Technical Communication and Documentation: Develop and deliver clear, concise technical reports and documentation, including EFA, work instructions, test equipment guidelines, test reports, and specifications
NPI Support: Lead NPI projects, ensuring smooth transfer of test technology to mass production
Knowledge Sharing and Mentorship: Mentor junior engineers, promote best practices, and facilitate knowledge transfer through technical training

Fulltime

Server Memory Validation Lead

As a Principal Member of Technical Staff (PMTS), you will play a pivotal role in...

Location

China , Shanghai

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Master’s degree with 10+ years of experience or a Bachelor's degree with 12+ years of demonstrated expertise in the development & execution of platform level electrical & functional test plans
Extensive hands-on experience and profound expertise in debugging I/O interfaces such as DDR memory systems
Proven experience in vendor management and AVL qualification processes
Thorough familiarity with signal measurement equipment, schematics, and layout documentation
Exceptional written and verbal communication skills, adept at conveying complex technical information
Advanced programming skills in Python, Ruby, Perl, or similar languages
Demonstrated self-motivation, strategic thinking, and program management skillsets, with a focus on innovation and team leadership

Job Responsibility

Lead, mentor, and manage a high-performing team of validation engineers dedicated to memory sub-system validation on AMD Server platforms
Provide strategic technical direction and leadership in the development of sophisticated test and validation plans for DDR interfaces
Design and implement comprehensive system-level memory sub-system validation test plans across AMD products, continually seeking innovation
Facilitate collaboration with silicon design teams, firmware, software, and automation teams to ensure smooth integration and validation processes
Consistently interact and collaborate with local memory vendors for enablement, debugging, and qualification to be included in the Approved Vendor List (AVL)
Deliver insightful project reports, analyze risks, and propose innovative solutions, ensuring timely resolution and strategic foresight
Utilize smart data analysis to constantly refine processes, enhance efficiency, and drive quality improvements across validation methodologies
Identify strategic opportunities to elevate validation processes, enhance automation tools, and drive methodologies for improved efficiency and effectiveness

What we offer

AMD benefits at a glance

Senior Test Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Hillsboro

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
Ability to meet Microsoft, customer and/or government security screening requirements
This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
This role will require access to information that is controlled for export under export control regulations
As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status
To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport

Job Responsibility

Responsible for product and engineering activities supporting new product development and manufacturing, with primary focus on memory test
Contribute to silicon bring-up, validation, and manufacturing readiness while working closely with cross-functional partners
Support semiconductor IC development across fabrication, manufacturing test, and packaging phases
Contribute to ATE test program development, including test method implementation, test bring-up, silicon characterization, debug, and yield analysis for embedded memories
Execute defined test plans and methodologies while identifying issues and escalating risks with clear technical data
Apply working knowledge of Design-for-Test (DFT), silicon fabrication processes, product qualification and reliability, and basic transistor theory
Collaborate with design, DFT, product, and manufacturing teams to support memory test readiness and issue resolution
Gain exposure to product domains such as high-performance computing, AI, GPUs, and telecom, as applicable to assigned projects
Apply industry-standard DFT features, including Memory BIST, JTAG, and at-speed testing
Support Memory BIST test content generation, pre-silicon validation, and post-silicon debug activities

Fulltime

Senior SoC HW (Functional) Validation Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Hillsboro

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role
Applied understanding of Computer Architecture and CPU/SoC validation principles, including: Understanding of SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++
At least 5+ years of experience
Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams
Verification, logic development, validation, or validation tools experience as part of a CPU, SoC and/or IP development team
Leadership skills
Demonstrated validation expertise in one or more of the following: Functional: Core, cache Coherency/mesh/fabric, PCIe/ IO, Memory Controller, Power Management
Power and Performance
Automation, Content Creation, or Tools/Scripts Development

Job Responsibility

Own post-silicon validation of one of the following areas – functional validation of cache Coherency/mesh/fabric
Define, guide, and contribute to the implementation of silicon debug tools and capabilities
Become an expert on the overall architecture, implementation of complex features/flows/protocols, and their interactions with other parts of the SoC, with the platform, and with software
Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements
Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools and other validation collateral
Execute content in post-silicon, triage and debug failures
Apply your growth mindset to learn and adapt in a complex and dynamic environment
Engage with partners to drive continuous improvement to the design, to validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers

Fulltime

Lead Test Development Engineer

Lead the definition and implementation of manufacturing test solutions, developi...

Location

United States , Santa Clara

Salary:

Not provided

Achronix Semiconductor

Expiration Date

Until further notice

Requirements

10+ years of experience in DFT, testing, or silicon validation
Solid understanding of scan insertion, ATPG, MBIST, and fault models
Experience with Synopsys TestMax, Siemens Tessent, and similar DFT EDA tools
Proficiency with JTAG, boundary scan, and related IEEE standards (1149.1, 1149.6)
Hands-on experience with ATPG, MBIST and functional pattern generation, simulation, and verification
Familiarity with script-based test case generators and industry-standard test pattern formats (WGL, STIL)
Proficiency in scripting languages (Python, Perl, or Tcl)
Strong debugging and problem-solving skills for silicon and test issues

Job Responsibility

Define and implement DFT architecture (scan, boundary scan, MBIST)
Collaborate with design and physical design teams to ensure integration and verification of DFT features
Design and implement test mode controls and access mechanisms
Generate and validate ATPG patterns for various fault types
Generate test cases targeting specific FPGA blocks and IP
Work with IP vendors to integrate testing solutions for external memory interfaces and high-speed I/O
Perform fault coverage analysis and implement improvements
Conduct gate-level simulations with test patterns
Perform silicon test pattern bring-up, validation, and debugging on lab bench and ATE platforms
Implement and debug scan, BIST, and functional tests on production testers

Fulltime

Technologist, ASIC Development Engineering (ASIC SOC Validation)

We are looking for a Technologist (ASIC validation engineer) to work with our ne...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BS/MS degree in Computer Engineering, Electrical Engineering, Computer Science or related field
12 – 17 years of experience on validation and debug
Experience coding in C for SSD embedded system, Python for test automation is a plus
SSD firmware/validation experience in areas of: USB, SD, PCIe/NVMe, NAND and related areas
Experience with lab debugging tools (debugger, logic analyzer, scope)
Good Knowledge in any of the storage protocol - eMMC/USB/NVMe protocol
Good Knowledge in any of the Electrical validation of the storage protocol - eMMC/USB/SD/SDIO/PCIE
Good Knowledge and hands on experience in scripting in C, Python language
Good Knowledge and deep hands on experience in Failure Analysis to understand the Test and FW/Memory features
Good knowledge in Test application development and performance measurement tool, etc.

Job Responsibility

Validation of DDR, PCIe/SD memory product with Host platforms from different OEM/Chipset vendors
Failure Analysis of the issues to root cause whether it is the test issue or product issue
Understand the architecture and design. Come up with validation plan and execute to completion
Understanding the test scenarios and converting them into test cases
Develop Validation firmware using C/C++ in multiple environments using latest standards: FPGA, Simulator, for flash products
perform tasks including SOC bring-up
features validation
ASIC and storage drive debugging
Compliance and interoperability procedures

Fulltime

Memory Sub-System Validation Lead - Data Center GPU

The Datacenter Graphics and Accelerated Computing Validation Team seeks a proact...

Location

Canada , Markham

Salary:

142960.00 - 214440.00 CAD / Year

AMD

Expiration Date

Until further notice

Requirements

Extensive experience in SoC validation, verification, and debugging of High-Bandwidth Memory subsystems
Lead functional and electrical validation plans development for memory features with cross-functional teams
Lead post-silicon debug, identify root causes, and guide corrective actions by partnering with stakeholders
Collaborate on memory-related silicon issues with Design, Verification, Silicon Validation, Manufacturing teams
Proficient with industry-standard tools: JTAG, I2C, Testers, and lab equipment
Strong programming skills (C/C++, Python) on Linux and Windows platforms
Effective team player, skilled at multitasking in fast-paced environments
Bachelors or Masters in Electrical or Computer Engineering

Job Responsibility

Oversee planning, execution, and debugging across all stages of pre- and post-silicon validation
Create and carry out test plans for HBM functional and electrical validation, including PVT Shmoo characterization

Fulltime

New

Senior Validation Engineer

The Senior Validation Engineer is responsible for planning, executing, and repor...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Experience in validation, test engineering, or related lab/automation work
Basic understanding of computer architecture and SoC/platform components (CPU/GPU, memory, I/O)
Comfortable in Linux and Windows environments
Experience with lab equipment and tools: oscilloscopes, protocol analyzers (PCIe/USB), or willingness to learn quickly
Strong attention to detail, disciplined test execution, and clear documentation
Python scripting for automation is a plus
Bachelor’s Degree (BS) in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Master’s Degree (MS) preferred

Job Responsibility

Learn AMD silicon and system features
understand new features in silicon, BIOS, firmware, SW, etc. Develop personal technical capability on each IP/Domain
Prepare and configure test environments, including hardware, firmware, drivers, and OS environments (Linux/Windows) according to validation plan’s requirements
Execute functional, stress, performance and regression tests per plan
Perform first-level issue triage, reproduce issues, capture high-quality logs/traces, and document defects clearly
Collaborate with global validation team, developer team and debug team for issue debug, fix verification
Write and maintain Python scripts to automate test execution
Provide concise daily/weekly status updates with coverage progress, defects and risks

Memory Validation Engineer

AMD

Location:
United States , Austin

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
April 05, 2026

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