CrawlJobs Logo

Memory Validation Engineer

United States, Austin 144800.00 - 217200.00 USD / Year · Job Posted April 05, 2026
Apply Position
Job Link Share

Job Description

Memory PHY post silicon validation engineer focused on bringing up of first silicon on aggressive time schedules. Memory PHY engineers develop and execute comprehensive test plans and debug issues as they arise. Candidates also enable and characterize memory features across PVT and ensure stability and robustness to enable high quality production.

Job Responsibility

  • Provide systems engineering and post-silicon support for HBM/DDR/LPDDR memory interface IP
  • Support bring-up of new products from first silicon in the lab through initial production
  • Triage observations from silicon validation and debug issues with ATE, Platform, Firmware, and Characterization teams
  • Provide post silicon expertise and support in silicon design, process, and integration flows for memory interface IP
  • Engage in pre-silicon activities by developing comprehensive test plans and running them in emulation to ensure robustness
  • Characterize memory PHY across PVT to validate and improve power and performance

Requirements

  • Memory PHY validation experience, including understanding firmware and memory IP
  • Programming experience, especially Python scripting and firmware debug as well as general understanding of Linux
  • Ability to adapt and learn new toolsets and frameworks
  • Laboratory experience, including hands-on use of equipment: oscilloscopes, signal generators, BERT, and logic analyzers
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Looking for more opportunities?

Search for other job offers that match your skills and interests.

Similar Jobs for

Memory Validation Engineer

8 matching positions

Post-Silicon Soc & System-Level Validation Engineer

This role focuses on validating end‑to‑end system behavior, ensuring that multip...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 12+ years of experience in pre‑silicon and/or post‑silicon SoC validation, with strong ownership in post‑silicon execution
  • Strong understanding of SoC architecture and subsystem interactions
  • Experience validating system‑level use cases and customer‑driven scenarios
  • Familiarity with debug tools, system logs, traces, and lab‑based validation setups
  • Strong understanding of SoC boot flows, firmware, and HW/SW interaction
  • Lab proficiency: Extensive experience using lab equipment such as oscilloscopes, protocol analyzers, signal generators, etc.
Job Responsibility
Job Responsibility
  • Own SoC‑level post‑silicon validation, focusing on interaction between multiple subsystems rather than isolated IP testing
  • Validate end‑to‑end system flows involving CPU cores, on‑chip memories, NoC/interconnect, IOs, power management, and firmware
  • Ensure correct behavior across boot, runtime, stress, error, and recovery scenarios at the SoC level
  • Develop validation test cases based on customer use cases (boot flows, IO usage, stress, concurrency, power transitions) into executable validation plans
  • Debug & root cause analysis: Perform deep SoC‑level debug to isolate failures across hardware, firmware, and system software boundaries
  • Lab execution & characterization: Use engineering lab equipment (oscilloscopes, protocol analyzers, signal generators, etc.) to validate and debug functional behavior
  • Documentation & reporting: Produce clear test plans, execution reports, failure analysis summaries, and status updates
  • track bugs/issues to closure
  • Fulltime
Read More
Arrow Right

Senior Member of Technical Staff (MTS) – Post‑Silicon SoC & System‑Level Validation Engineer

This role focuses on validating end‑to‑end system behavior, ensuring that multip...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 12+ years of experience in pre‑silicon and/or post‑silicon SoC validation, with strong ownership in post‑silicon execution
  • Strong understanding of SoC architecture and subsystem interactions
  • Experience validating system‑level use cases and customer‑driven scenarios
  • Familiarity with debug tools, system logs, traces, and lab‑based validation setups
  • Strong understanding of SoC boot flows, firmware, and HW/SW interaction
  • Lab proficiency: Extensive experience using lab equipment such as oscilloscopes, protocol analyzers, signal generators, etc.
Job Responsibility
Job Responsibility
  • Own SoC‑level post‑silicon validation, focusing on interaction between multiple subsystems rather than isolated IP testing
  • Validate end‑to‑end system flows involving CPU cores, on‑chip memories, NoC/interconnect, IOs, power management, and firmware
  • Ensure correct behavior across boot, runtime, stress, error, and recovery scenarios at the SoC level
  • Develop validation test cases based on customer use cases (boot flows, IO usage, stress, concurrency, power transitions) into executable validation plans
  • Debug & root cause analysis: Perform deep SoC‑level debug to isolate failures across hardware, firmware, and system software boundaries
  • Lab execution & characterization: Use engineering lab equipment (oscilloscopes, protocol analyzers, signal generators, etc.) to validate and debug functional behavior
  • Documentation & reporting: Produce clear test plans, execution reports, failure analysis summaries, and status updates
  • track bugs/issues to closure
What we offer
What we offer
  • AMD benefits at a glance
  • Fulltime
Read More
Arrow Right

Senior Post Silicon Validation Engineer

The GPU/accelerator products powering the world's largest AI training and infere...
Location
Location
Malaysia , Penang
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Experienced in post-silicon validation or a closely related hardware validation discipline
  • Hands-on lab debug experience with standard instrumentation including oscilloscopes, protocol analyzers, and logic analyzers
  • Strong understanding of GPU or accelerator architecture, including memory hierarchy, compute pipelines, and on-chip interconnects
  • Working knowledge of high-speed interconnects and fabric technologies such as PCIe, CXL, xGMI, or similar
  • Proficiency in scripting and automation using Python or similar languages
  • Bachelor's or Master's in computer engineering or computer science or electrical engineering, or comparable disciplines
Job Responsibility
Job Responsibility
  • Own functional validation for a defined domain of the server GPU/accelerator, including test plan development, lab execution, debug, and issue resolution
  • Perform post-silicon bring-up and validation in the lab, including power-on sequencing, clock/reset checkout, and IP-level functional verification
  • Validate accelerator functionality at the system level, including multi-GPU configurations, host-GPU interaction, fabric connectivity, and platform integration
  • Drive cross-functional debug with silicon design, firmware/driver, platform engineering, pre-silicon verification, and program management teams to root-cause and resolve issues
  • Develop and maintain test automation and scripting infrastructure to scale validation coverage and efficiency
  • Develop validation plans grounded in architecture specifications, identifying coverage priorities and risk areas
  • Mentor junior engineers on debug methodology, lab skills, and validation best practices
  • Represent validation in program-level reviews, communicating status, risks, and readiness assessments
  • Fulltime
Read More
Arrow Right

Systems Design Engineer - Memory Enablement

We are looking for a dynamic, energetic and a strong Enablement Engineer for Mem...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 8+ years of Memory enablement experience for any type of SoCs especially x86 containing multi core CPU/GPU subsystems with focus on memory technologies like DDR5/LPDDDR5
  • Strong understanding of Memory Subsystem including the Memory PHY and Controller understanding, various DDR/LPDDr topologies and configurations, and ecosystem collaboration
  • Expertise in CPU subsystem in x86 / any SoC environment with Strong and Proven expertise in conducting tests and experiments towards enabling memory during Boot and Post -boot enablement
  • Good understanding of x86 HW, FW and BIOS Architecture
  • Strong communication and cross-functional collaboration abilities
  • Exposure to certain stages of Silicon Validation will be crucial, including use-case validation
  • Knowledge of shell programming/scripting (e.g. Tcl Perl, Python etc.)
  • Hands-on experience dealing with Memory Analyzers
  • Bachelors or Masters degree in electrical or computer engineering
Job Responsibility
Job Responsibility
  • Owning memory sub system implementation based on the Product requirements
  • Conducting day-to-day experiments for Memory enablement
  • Maintaining Test plans and reports and scrubbing the JIRA tickets on a periodic basis
  • Developing required test scripts for small tasks
  • Problem solving - the successful candidate loves debugging complex problems and has a track record of doing so
  • Work with the Memory Lead and senior members in refining the processes, and demonstrate keen interest to learn and explore new methods/ideas pertaining to memory subsystem
What we offer
What we offer
  • AMD benefits at a glance
  • Fulltime
Read More
Arrow Right

Pre-silicon Validation Engineer - Emulation

We are looking for a dynamic, energetic Systems Design Engineer to join our grow...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Significant 5+ years of relevant experience in complex SoC verification & Validation
  • Prior hands-on experience with FPGA and/or emulation platforms (Veloce, Palladium, ZEBU, HAPs, Protium)
  • Developing C/C++/Uefi based test content
  • Validating hardware features for at least 3 or more projects in a pre-silicon environment
  • Debugging failures using waveform viewers, log files and microcode trace dumps
  • Knowledge of low power design emulation/verification and power management fundamentals
  • Knowledge of UEFI, Windows Operating Systems, Linux
  • Knowledge of x86 and/or ARM SoC Architecture
  • Knowledge of Memory subsystem, high speed IO peripherals like PCIe, USB, NPU, SoC & IP level Power Management flow, Security protocols
  • Knowledge of one or more protocols
Job Responsibility
Job Responsibility
  • Driving technical innovation to improve AMD's capabilities across validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives
  • Debugging issues found during the process, bring-up, validation, and production phases of SOC programs
  • Working with multiple teams, and tracking test execution to make sure all features are validated and optimized on time
  • Working closely with supporting technical teams
  • Engaging in other software/hardware modeling frameworks
  • Fulltime
Read More
Arrow Right

Sys/Test Validation Engineer 2

We are looking for a Systems Test Validation Engineer with hands-on experience i...
Location
Location
Taiwan , Taipei
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Experience in post-silicon system validation or L10 system testing on server platforms
  • Basic familiarity with BIOS or BMC firmware validation, bring-up, or board-level testing
  • Ability to debug system-level issues involving BIOS, BMC, firmware, or hardware interactions
  • General understanding of server platform architecture (CPU, memory, chipset)
  • Experience using scripting languages (Python, shell, etc.) for test or debug support
  • Interest in server hardware, firmware, and platform validation
  • Comfortable working with firmware, hardware, and board development teams to resolve issues
  • Effective communication skills working across large multi-functional HW, SW, architecture teams
  • Bachelor's or Master's degree in electrical engineering, Mathematics, Computer Science, Engineering, or an equivalent
Job Responsibility
Job Responsibility
  • Execute system-level test cases to validate server BIOS and BMC functionality
  • Validate BIOS and BMC behavior across boot, power, reset, and management flows on server platforms
  • Analyze, reproduce, and document system-level failures found during L10 validation
  • Work with firmware developers, hardware developers, and board design teams to debug and resolve BIOS/BMC issues
  • Support improvements to L10 validation coverage and test procedures based on defect findings
  • Assist in maintaining and enhancing test scripts or basic automation used in system validation
  • Fulltime
Read More
Arrow Right

Sr. Sys/Test Validation Engineer

We are looking for a Systems Test Validation Engineer with hands-on experience i...
Location
Location
Taiwan , Taipei
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Experience in post-silicon system validation or L10 system testing on server platforms
  • Basic familiarity with BIOS or BMC firmware validation, bring-up, or board-level testing
  • Ability to debug system-level issues involving BIOS, BMC, firmware, or hardware interactions
  • General understanding of server platform architecture (CPU, memory, chipset)
  • Experience using scripting languages (Python, shell, etc.) for test or debug support
  • Interest in server hardware, firmware, and platform validation
  • Comfortable working with firmware, hardware, and board development teams to resolve issues
  • Effective communication skills working across large multi-functional HW, SW, architecture teams
  • Bachelor's or Master's degree in electrical engineering, Mathematics, Computer Science, Engineering, or an equivalent
Job Responsibility
Job Responsibility
  • Execute system-level test cases to validate server BIOS and BMC functionality
  • Validate BIOS and BMC behavior across boot, power, reset, and management flows on server platforms
  • Analyze, reproduce, and document system-level failures found during L10 validation
  • Work with firmware developers, hardware developers, and board design teams to debug and resolve BIOS/BMC issues
  • Support improvements to L10 validation coverage and test procedures based on defect findings
  • Assist in maintaining and enhancing test scripts or basic automation used in system validation
  • Fulltime
Read More
Arrow Right

Hsio Electrical Validation Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING  At AMD, our mission is to build great pro...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 4-8 years of experience in hardware architecture, logic/circuit design, and implementation
  • Experience with one of the Memory JEDEC standards (LPDDR5x/DDR5), USB up to Gen4, PCIe up to Gen5
  • Strong Understanding of SI fundamentals and high speed design concepts
  • Familiarity with programming/scripting languages (C/C++, Python, Perl, etc.)
  • Working knowledge of Server OSes (Linux, Windows Server)
  • Familiarity with high-speed circuit testing and DFT methods
  • Skilled in MS Office, MS Project, Confluence, MS SharePoint, and Jira
  • Debug techniques and methodologies
  • Extensive knowledge of system architecture, technical debug, and validation strategy
  • Strong analytical/problem-solving skills and pronounced attention to details
Job Responsibility
Job Responsibility
  • Execute engineering projects, ensuring alignment with AMD management and technical guidance
  • Engage with internal and external stakeholders in product planning, development, and validation activities
  • Facilitate team communications and reviews with management and customers, providing clear status updates and progress reports
  • Define and develop IO electrical validation requirements and test coverages to ensure compliance and success at the platform level
  • Develop and manage comprehensive validation strategies, plans, and schedules by integrating inputs from various engineering and business departments
  • Conduct hands-on measurement and characterization of Post-Si IO electrical interfaces using advanced lab equipment such as oscilloscopes, TDR, VNA, and more
  • Plan and execute SI validation for next-generation interconnects (DDR5, LPDDR5, USB4.0, PCIe Gen4/5 )
  • Own and drive the debugging of Post-Si electrical issues, collaborating with hardware, BIOS, firmware, and OS teams to recommend effective solutions
  • Own the Compliance, Cert and EV for the respective interfaces
  • Fulltime
Read More
Arrow Right