Job Description
Meet the Team Join Cisco’s ASIC Design for Test (DFT) Team, where innovation, collaboration, and technical excellence drive everything we do. As a group of passionate engineers, we are committed to pushing the boundaries of testability and reliability in complex silicon systems. Our mission is to enable robust, high-quality silicon by architecting and implementing advanced DFT solutions. Working in close partnership with design, verification, and physical implementation teams, we ensure that every Cisco chip is not only powerful, but also rigorously tested and dependable. Here, you’ll play a pivotal role in shaping the future of test engineering while growing alongside some of the best minds in the industry. Your Impact In this role, you will be central to Cisco’s silicon quality and innovation by developing advanced DFT strategies that ensure every chip meets the highest standards for testability and reliability. You will address challenges across digital and mixed-signal domains, collaborating with multi-functional teams to design, implement, and optimize sophisticated test solutions. Your work will enhance product robustness, accelerate silicon validation, and drive progress in automated test methodologies. Architect and Implement DFT Solutions: Design and integrate advanced Test Access Mechanisms (TAM), scan chains, Built-In Self-Test (BIST), and Memory BIST (MBIST) infrastructures for complex integrated circuits. Test Planning and Coverage Analysis: Lead test planning, test pattern generation, and fault coverage analysis to improve test coverage for both digital and mixed-signal designs. Collaborate Across Teams: Work closely with design, verification, ATE, and physical design teams to ensure DFT structures meet functional, timing, and implementation requirements. Leverage Tools and Automation: Apply and develop automation scripts and in-house tools for DFT workflows, including MBIST pattern generation and fault simulation, using industry-standard EDA solutions. Fault Diagnosis and Debugging: Identify, analyze, and debug issues related to DFT structures, perform root cause analysis on failed tests, and recommend design changes for improved testability. Documentation and Reporting: Prepare detailed documentation on test plans, test coverage, and debugging results; report on DFT metrics to ensure compliance with company and industry standards.
