Manager Silicon Design Engineering Job at AMD (Penang)

Silicon Design Engineer

Be part of AMD IO IP team, joining IP design work on host controller IP for the ...

Location

Taiwan , Hsinchu; Taipei

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Expert in Static Timing Analysis, familiar with DC, PT, GCA, and commands, worked in timing closure tasks with high clock frequency
Expert in Verilog RTL design on large-scale digital IP
Good English communication, presentation, and documentation
Work is performed with limited supervision. Strong sense of task scheduling and delivering on time as predetermined milestones committed to the manager
Can solve complex, novel, and non-recurring problems
Major in EE, CS or related, Master Degree or Bachelor with solid working experiences

Job Responsibility

Takes part in host controller development based on architectural requirements for next-generation IO
Works on STA tasks such as defining clock architecture, creating SDC and exceptions, and analyzing timing reports
Works on RTL code development for IP blocks in Verilog HDL to ensure functionality is correct and reusable for multiple product lines
Deals with complex problems in both STA and RTL
Makes technical decisions
Coaches and mentors junior staff

Senior Manager Silicon Design Engineer

AMD seeks a passionate, collaborative leader with strong technical skills and th...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

12-15 years full-time experience in IP hardware design
Proven experience managing and leading engineering teams
Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs
Verilog lint tools (Spyglass) and verilog simulation tools (VCS)
Clock domain crossing (CDC) tools
Detailed understanding of SoC design flows
Understanding of IP/SS/SoC Power Management techniques – Power Gating, Clock Gating
Outstanding interaction skills while communicating both written and verbally
Ability to work with multi-level functional teams across various geographies
Outstanding problem-solving and analytical skills

Job Responsibility

Lead a Silicon Engineering group and innovate with internal teams and external partners to create the next generation of computing technologies
Help bring to life cutting-edge designs, working closely with architecture, physical design, and product engineers to achieve first pass silicon success
Design of IP and subsystems with integration of AMD and other 3rd party IPs
Work collaboratively with other members of the IP team to support design verification, implementation, synthesis, constraints, static timing analysis, and delivery to SOC
Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up

Silicon AMS Technical Program Manager

The Reality Labs Custom Silicon Program Management team at Meta is pioneering br...

Location

United States , Sunnyvale

Salary:

168000.00 - 234000.00 USD / Year

Program Manager

At AMD, our mission is to build great products that accelerate next-generation c...

Location

United States , Secaucus

Salary:

177757.00 - 199200.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Master’s degree or foreign equivalent in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, Industrial Engineering, Systems Engineering, or related field
Three (3) years of experience in the job offered or closely related engineering or program management role
Three (3) years of experience in: Cross-functional team management
System-level server platforms and components (PCBAs, GPU, memory, and test scripting)
Project management in developing schedules and tracking to milestones
Reliability Engineering functional area that is related to servers and racks
Driving Reliability Test schedules

Job Responsibility

Apply knowledge of engineering principles, material science, and technologies to the design, development, and testing of various company products
Develop creative solutions and processes to meet aggressive post-silicon schedules
Guide systems engineering and silicon design teams through the various phases of bring-up, product definition, and product validation and production ramp while assisting in debugging hardware issues in the post-silicon phase
Drive schedules, resources, status, and cross-functional alignment of engineering tasks specific to reliability-based tests
Determine project equipment needs
Prepare engineering specifications for production of products and/or systems
Analyze requirements, capacity, cost, or customer needs to determine project feasibility
Confer with engineers, customers, or other stakeholders to discuss existing or potential electronics engineering projects or products
Prepare necessary criteria, procedures, reports, or plans for successful conduct of the project with consideration given to site preparation, facility validation, installation, quality assurance, and/or testing
Evaluate project work to ensure effectiveness, technical adequacy, or compatibility in the resolution of complex electronics engineering problems

Technical Project Manager - Optical Test Systems

We are seeking an experienced and dynamic Technical Project Manager with a stron...

Location

United States , North Reading

Salary:

140500.00 - 224800.00 USD / Year

Teradyne

Expiration Date

Until further notice

Requirements

Bachelor’s degree in Optical Engineering, Physics, Electrical Engineering or related discipline
master’s degree is preferred
certifications in optical engineering are a plus
5+ years experience in optical systems design and project management
Certification in Project Management (e.g., PMP, PRINCE2) is preferred
Proven track record of successfully managing complex projects from inception to completion
Strong understanding of optical principles, systems, and technologies
Proficiency in project management tools and software (e.g., Primavera, Microsoft Project)
Ability to work effectively in a fast-paced, dynamic environment
Strong problem-solving and analytical skills

Job Responsibility

Lead and manage projects involving the design, development, and deployment of optical test systems
Collaborate with cross-functional teams, including marketing, systems engineering, design engineering, and operations to ensure project milestones are met
Develop project plans, timelines, and budgets, and monitor progress against these metrics
Identify and mitigate risks and challenges throughout the project lifecycle
Communicate project status, updates, and issues to stakeholders, senior management, and customers
Provide technical guidance and support to team members and clients
Manage project documentation, including specifications, design documents, test plans, and reports
Foster a culture of continuous improvement and innovation within the project team

What we offer

medical
dental
vision
Flexible Spending Accounts
retirement savings plans
life and disability insurance
paid vacation & holidays
tuition assistance programs

Principal Silicon Design Engineer

As CAD Manager you will be responsible for leading and optimizing the EDA enviro...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

10+ years of silicon EDA and/or digital ASIC design experience
PPA Power Performance Area Optimization
Virtuoso based custom Layout tools and flows
Calibre extraction flows, Totem & Redhawk for EM/IR
TCL, Python, PERL, or other scripting languages
2+ years in one or more of these tools: Design compiler, IC Compiler, Fusion Compiler, Cadence Virtuoso and Custom Compiler
Physical aspect of VLSI designs
Strong written and verbal communication skills
Bachelors or Masters degree in Computer Engineering/Electrical Engineering

Job Responsibility

Lead and manage the CAD infrastructure team supporting multiple IC design projects
Establish and maintain standardized design flows and methodologies
Implement and support customized CAD flows for Fabric design groups
Enable the team in meeting the design and development targets by working closely with external tool vendors
Develop tools flows methodologies on digital back-end domains, sign-off flows for timing, power, EM/IR, DRC/LVS/DFM, etc.
Improve engineering efficiency while improving design quality in IP release process
Be single point contact for bugs and issues for custom and analog physical design team
Build flow in TCL, Python to ensure quality and faster executions
Understand different methodologies used across industry to adopt best practices
Leverage and deploy AMD AI systems to design teams

Technical Program Manager

At Hewlett Packard Enterprise (HPE), we're at the forefront of the AI and superc...

Location

United States , Houston; Chippewa Falls; Ft. Collins; San Jose; Remote

Salary:

119500.00 - 275000.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, or a related technical field
5+ years of experience in technical program management, software engineering, or hardware engineering
Proven experience managing the New Product Introduction (NPI) lifecycle for complex hardware and software products
Demonstrated experience leading cross-functional teams to deliver products on schedule
Agile, PMP, or other program management certifications are a plus
HW, SW,Six Sigma, etc.

Job Responsibility

End-to-End Program Leadership: Own and manage the entire lifecycle of complex HPC & AI programs, from initial concept and architectural definition through development, validation, and customer delivery. Define program scope, deliverables, and success metrics
Cross-Functional Execution: Lead and align a diverse team of hardware engineers (silicon, systems, networking), software developers (firmware, OS, AI frameworks), product managers, supply chain experts, and marketing teams. Foster a collaborative environment to ensure seamless execution
Technical Roadmapping & Scheduling: Create and maintain integrated master schedules that track hardware development milestones (e.g., CPU/GPU integration, system design, validation) alongside software release cadences. Identify and manage the critical path and interdependencies
Risk & Dependency Management: Proactively identify technical and logistical risks, develop mitigation strategies, and manage complex dependencies between internal teams and external partners (e.g., NVIDIA, AMD, Intel). You're not just tracking risks
you're actively solving them
Stakeholder Communication: Serve as the central point of communication for your programs. Clearly and concisely report on status, risks, and decisions to executive leadership and key stakeholders. Translate complex technical issues into clear business impact
Drive Technical Decisions: Leverage your deep technical knowledge of HPC/AI architectures—including accelerators (GPUs), high-speed interconnects, liquid cooling, and system management software—to facilitate technical trade-offs and drive architectural decisions that align with program goals
Manage complex projects following defined PLM process and governance, utilize PDP tools, and implement best practices across each phase of PLM
Create and manage high confidence program schedules with clear dependencies, critical path, and systematic methodology to communicate program status. Manage risks and mitigations, and re-plan as events warrant
Provide clear, timely and objective communication to executive management and other stakeholders

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

Photonics Layout and Design Automation Manager

Aeva’s mission is to bring the next wave of perception to a broad range of appli...

Location

United States , Mountain View

Salary:

181300.00 - 245300.00 USD / Year

Aeva

Expiration Date

Until further notice

Requirements

Hands-on code based photonics layout experience with the ability to step-in to the details as needed
2+ years of experience with managing or leading photonics layout teams
5+ years of photonic circuit layout and design automation experience, in a field of integrated photonics
Proficiency in one or more of the commercial software tools commonly used in photonics mask layout from Cadence (SKILL based), Synopsys OptoDesigner/OptoCompiler, Luceda Photonics, or similar
Comprehensive understanding of various areas of CAD developments encompassing p-cell development, layout automation, library management, physical verification, and code revision control including regression testing
Experience with the semiconductor fabrication process to understand design rules with the demonstrated expertise to transform designs into layout with high level instruction from design
Experience with source code and library management
Demonstrated ability to communicate project status in a clear and concise manner
Strong communication and interpersonal skills, capable of working with cross-functional teams and stakeholders
Proven ability to work in a fast-paced and dynamic environment, managing multiple priorities and projects simultaneously

Job Responsibility

Plan, drive and execute code-based layout activities to deliver on-time delivery of photonics p-cells, circuits and chipsets
Hire and manage a team of photonics layout engineers with appropriate resource planning
Actively manage photonic layout libraries and working across teams to deliver photonics layout with high level guidance from design
Drive development activities including p-cell development, full circuit layout, schematic driven layout and design, physical verification, and library management
Drive and participate in design automation advancements to implement an integrated environment for photonics simulation and layout tools including establishing a road map for photonics design automation
Work cross-functionally with design, process, and test teams to develop CAD infrastructure that facilitate the compliance of DfX requirements and foundry design rules
Manage in-house photonic component model and layout libraries with proper revision control and regression tests
Continuously monitor quality escapes and deploy corrective actions with a proper root cause analysis

What we offer

Very competitive compensation and meaningful stock grants
Exceptional benefits: Medical, Dental, Vision, and more
Unlimited PTO: We care about results, not punching timecards

Manager Silicon Design Engineering

AMD

Location:
Malaysia , Penang

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Nice to have:

Additional Information:

Job Posted:
December 17, 2025

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Manager Silicon Design Engineering

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Location:Malaysia , Penang

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Job Description:

Job Responsibility:

Requirements:

Nice to have:

Additional Information:

Job Posted:December 17, 2025

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