This list contains only the countries for which job offers have been published in the selected language (e.g., in the French version, only job offers written in French are displayed, and in the English version, only those in English).
To lead Die Attach Process Module Engineering team for Process/Materials Development, Qualification and Transfer to HVM. Responsible for Key technology development & tech-staging to drive and enable product, process and materials technology roadmap solutions for next generation memory storage packaging solutions.
Job Responsibility:
To lead Die Attach Process Module Engineering team for Process/Materials Development, Qualification and Transfer to HVM
Responsible for Key technology development & tech-staging to drive and enable product, process and materials technology roadmap solutions for next generation memory storage packaging solutions
To lead or co-lead Development JET (Joint Engineering Team) with global cross-functional teams incl. process, materials, CPI, package design, thermal-mechanical simulation, quality and other related stakeholders
To build and nurture strong process development team related to high density ultra-thin die attach process, material and packaging architecture - emphasizing deep engineering fundamental, structured methodology and DOE planning / execution / analysis
To lead studies related to in-depth fundamental investigation/characterization in packaging development
Ensure strong materials to process/design compatibility to meet stringent quality and reliability requirements from customers and industry standards
To co-drive material technology roadmap definition and path finding/development programs with global cross-functional teams including product design, process engineering, lab characterization teams and test engineering in delivering Best-In-Class and Industry leading products
To lead and drive collaboration with strategic equipment & material suppliers, service providers, academia, industry consortium in collaboration projects or co-development activities
To drive breakthrough in product packaging materials and process
To support IR5.0 Digital Transformation for Packaging process e.g. Process Digital Twins, Advanced Process Control (APC), Fault Detection Control (FDC), fundamental lab characterization and design rules definition
Drive yield analysis activities in process characterization and qualification phases
To drive in-depth fundamental engineering investigation culture and problem-solving methodology in delivering robust packaging technology
Requirements:
Master Degree or PhD in Materials Engineering / Mechanical Engineering / Physics / Micro-electronics
Strong hands-on experience Packaging technology development experience and well-versed with structured R&D methodology
Strong experience in driving technology roadmap and technology innovation to achieve best-in-class advanced packaging technology solutions
Minimum 10 years of Semiconductor Packaging Process with in-depth knowledge on IC packaging processes, high-density / ultra-thin die stacking technology development hands-on & indepth exposure
Proven capabilities to navigate through highly dynamic and fast-paced project requirements and interdependencies
Ability to lead complex technical investigation and analysis with global cross-functional teams
Ability to work with internal development / HVM teams and suppliers on process qualification and co-development
Nice to have:
Experience in application of AI / ML-augmented engineering development and innovation and analytics
Proven experience with in-depth engagement in materials and process technology fundamentals, with materials characterization lab either internally, suppliers or other 3rd party
Personal hands-on experience on advanced lab instruments e.g. SEM/FIB, EDX/FTIR, Shadow Moire, will be added advantage