Manager Packaging Engineering Job at AMD (Hsinchu)

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: This role provides leadership for a team of engineers working closely with OSATs and cross-functional partners to enable new product bring-up and sustaining support for InFO, EFB/CoWoS-L, CoWoS-S, WLFO, FCBGA, LGA, and chiplet packages. The position is accountable for team execution, technical direction, and delivery of manufacturing readiness, yield improvement, and continuous improvement objectives across backend engineering operations. THE PERSON: The ideal candidate brings deep technical expertise in InFO, EFB/CoWoS-L, CoWoS-S, WLFO, FCBGA, LGA, and chiplet packaging together with proven experience leading high-performing engineering teams. This individual should be able to provide strong technical and team leadership while driving disciplined execution across manufacturing operations. The successful candidate must be a strong people leader and team player with a commitment to execution excellence and talent development. This person will set direction, remove barriers, and drive solutions in a fast-paced environment while fostering collaboration across internal and external stakeholders. The role requires excellent cross-functional leadership, strong interpersonal skills, and effective communication and presentation abilities, with good command of both written and spoken English.

Job Responsibility

Provide leadership for a team of engineers responsible for InFO, EFB/CoWoS-L, CoWoS-S, WLFO, FCBGA, LGA, and chiplet package manufacturing readiness for new product bring-up at manufacturing sites
Own team execution for packaging yield, quality, cost, and operational productivity improvement and sustaining activities
Define technical direction and drive assembly process baseline standardization and continuous improvement across supported manufacturing sites and suppliers
Oversee packaging interaction activities across assembly, bump, 3D IC, HBM, wafer fab, wafer sort, functional test, and mark/pack to ensure aligned execution and issue resolution
Partner with assembly manufacturers to enhance process, equipment, and material capability for future-generation technology products
Work closely with Packaging BU and cross-functional stakeholders to ensure NPI and ramp readiness at manufacturing sites, with disciplined follow-up on team deliverables and timely status reporting
Manage team performance in driving assembly manufacturing site and supplier performance related to yield, quality, out-of-control lot disposition, and outlier management, with clear closed-loop reporting
Lead engagement with internal engineering counterparts and broader package engineering, procurement, supply chain, reliability, and other organizations to deliver programs with accurate and timely status updates throughout the product life cycle
Own strategic supplier management, including relationship management, performance reviews, issue escalation, and alignment to business and technology objectives
Lead planning and execution of change management initiatives driven by internal or external stakeholders
Build organizational capability through hiring, coaching, performance management, succession planning, and development of engineering talent and bench strength
Perform other duties as assigned by the supervisor in support of organizational and business priorities

Requirements

Minimum 15 years of experience in InFO or 2.5D/3D bump/TSV/packaging, Flip Chip BGA/LGA, or WLFO process engineering, with strong hands-on experience in assembly manufacturing operations
Deep knowledge of InFO, chiplet packaging, 2.5D/3D TSV/packaging, Flip Chip BGA/LGA processes, and chip-package interaction
Demonstrated experience leading and scaling engineering teams, including coaching, performance management, succession planning, and development of technical talent
Minimum 5 years of experience in supplier management, including performance management, issue escalation, and stakeholder engagement
Familiarity with DOE, JMP, and data-driven problem-solving methodologies
MS degree in Mechanical, Materials, Chemical Engineering, or a related field is preferred
Highly motivated leader with the ability to balance strategic direction and operational execution, drive solutions, and lead teams effectively in a fast-paced, multi-tasking environment
Strong experience preparing reports and executive presentations, and communicating root cause, resolution, and program status effectively to all levels of the organization
Strong leadership presence with the ability to coach, motivate, and develop engineers while maintaining high standards of technical execution
Excellent interpersonal, communication, analytical, project management, and prioritization skills
Proven ability to lead horizontally across multiple internal functional organizations, influence stakeholders, and align external partners
Experience in a semiconductor engineering environment with NPI through HVM leadership responsibility
Bachelor/MS degree in Mechanical or Material or Chemical Engineering

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