CrawlJobs Logo
AMD Logo AMD · IT - Software Development

Lead Soc Verification Engineer

India, Hyderabad · Job Posted June 30, 2026
Apply Position
Job Link Share

Job Description

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

Job Responsibility

  • Develop/Maintain tests for functional verification at SOC level
  • Build testbench components to support the next generation IP
  • Maintain or improve current verification libraries to support SOC/Full-chip level verification
  • Provide technical support to other teams
  • Help Hardware emulation team to port the RTL to Palladium/Zebu or HAPS/Protium platforms.

Requirements

  • Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
  • Familiarity with Verilog and General Logic Design concepts
  • Knowledge of system-level architecture including buses like AXI/AHB, bridges, memory controllers such as DDR4/DDR5, and peripherals such as USB, PCIe and Ethernet
  • Knowledge of industry‑standard cryptographic and security algorithms (e.g., AES, RSA, SHA)
  • Strong working knowledge of UNIX environment and scripting languages such as Perl or Python
  • Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM/XCELIUM, Verdi, QUESTASIM
  • Experience using UNIX Revision Control tools - ICM manage, CVS, Perforce and bug tracking tools such as JIRA
  • Experience in verifying multimillion gate chip designs from specifications to tape-out
  • Excellent communication and presentation skills
  • Demonstrate the ability to work with cross-functional teams
  • BS/MS EE, CE, or CS
  • 8+ years of design verification experience
  • OOP coding experience (System Verilog, SpecmanE or C++) and SV Assertions

Nice to have

  • Familiarity with processors and boot flow would be useful
  • Familiarity with Software development flow including assembly and C is beneficial
AMD - All Job Offers

Looking for more opportunities?

Search for other job offers that match your skills and interests.

Suggested Tags: Frontend Developer Secretary Talent Manager Salesforce Administrator Data Analyst
Similar Jobs for

Lead Soc Verification Engineer

8 matching positions

Platform Soc Debug Lead Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...
Location
Location
United States , Austin
Salary
Salary:
200000.00 - 300000.00 USD / Year
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Strong understanding of Server platform components, x86 or other complex CPU architectures
  • Deeper domain expertise in areas such as IO interfaces - PCIe, CXL, RAS, Power management to drive comprehensive system level test-plan execution
  • Understanding of BMC firmware and features, including IPMI, Redfish, sensor monitoring, power control, and remote management is a plus
  • Prior experience with computer system design and/or validation, testing tools, and environments
  • Experience with handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools
  • Proficiency in C, Python, and shell scripting for low-level development and debug
  • Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines
  • Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization
  • Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up) is a plus
  • BS or MS degree in Electrical Engineering or related major, with 12+ years of applicable experience
Job Responsibility
Job Responsibility
  • Lead platform and SoC debug for EPYC/AI server platforms, driving issue resolution, validation, and quality to meet program milestones
  • Lead debugging efforts for enabling AI/Server SoC platforms in domains such as high-speed data-center I/O (PCIe, CXL, etc.), RAS features to resolve issues efficiently that are seen from the program execution
  • Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment
  • Improve debug capabilities and methodology over time by identifying common challenges or impediments to efficient debug and working with partner organizations like design, Firmware and software teams to drive innovation in silicon architecture, design, tools and methods
  • Manage and track technical issues, risks, and priorities effectively with the business unit and SW Debug tools teams
  • Manage customer and executive communications, including program status, risks and opportunities
  • Maintain strong communication skills, both verbal and written, to convey summary findings and recommendations to senior management
  • Fulltime
Read More
Arrow Right

Senior SOC Debug Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 8+ years of pre-silicon SOC or subsystem or IP verification experience
  • Candidate must have at least a bachelor’s or master’s degree in electrical, Electronics, Computer Engineering, Computer Science or a related degree
  • 6+ years of verification experience working on CPU/SOC designs, with 2+ years of design for debug verification experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • This role will require access to information that is controlled for export under export control regulations
  • As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status
  • To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport
Job Responsibility
Job Responsibility
  • Own verification of Design for Debug (DFD) SoC level flows including Task planning and schedule estimation, proactively identifying and removing roadblocks and finding ways to make the team more efficient
  • Develop verification strategy, requirements, environments, tools, and methodologies
  • Become an expert on the overall debug architecture, understand customer use models, and understand interactions with other parts of the SOC, with the platform, and with software
  • Apply your knowledge of verification principles and techniques and your judgement to write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral
  • Run tests, debug failures to root cause, and recommend fixes
  • Apply your growth mindset to learn and adapt in a complex and dynamic environment
  • Engage with partners to drive continuous improvement to both the design, to verification plans/collateral, and to methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
  • Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
  • Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers
  • Delight your customers by providing high quality results on schedule
  • Fulltime
Read More
Arrow Right

Senior SOC Fabric Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Hillsboro
Salary
Salary:
119800.00 - 234700.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
Job Responsibility
Job Responsibility
  • Own verification of complex flows at the SOC or subsystems levels
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • Innovate to improve verification efficiency through methodologies or tools
  • Apply industry leading generative AI solutions to verification work
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right

Principal Silicon Design Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Mountain View
Salary
Salary:
142800.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role
  • Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • This role will require access to information that is controlled for export under export control regulations
  • successful candidate will be required to provide either proof of their country of citizenship or proof of their US residency or other protected status
  • successful candidate's citizenship will be verified with a valid passport
Job Responsibility
Job Responsibility
  • Own the development of C and C++ based test content at the subsystem and SoC levels
  • Build and maintain the C test infrastructure that the broader team relies on
  • Own the pre-silicon verification strategy and execution for one or more security IP blocks and subsystems
  • Architect and extend SystemVerilog and UVM environments that host C-based stimulus
  • Drive coverage signoff across functional, code, and power-aware coverage
  • Act as verification lead and technical point of contact for customer and partner teams
  • Mentor and guide less experienced engineers
  • Improve verification efficiency by building reference and prediction models, automation, and debug tooling in Python and other scripting languages
What we offer
What we offer
  • Benefits and other compensation
  • Fulltime
Read More
Arrow Right

Design Verification Engineer - Machine Learning Accelerators

Reality Labs focuses on delivering Meta's vision through Augmented Reality (AR) ...
Location
Location
United States , Sunnyvale
Salary
Salary:
178000.00 - 250000.00 USD / Year
meta.com Logo
Meta
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 10+ years of hands-on experience in SystemVerilog/UVM methodology and C/C++ based verification
  • 10+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
  • Track record of 'first-pass success' in ASIC development cycles
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
Job Responsibility
Job Responsibility
  • Work with cross-functional leads, including product managers, systems architects, researchers, and software architects, to develop industry leading Machine Learning IP's optimized for Mixed Reality and Smart Devices and use-cases, defining verification methodologies for each of the different core IPs
  • Define, track, and lead the execution of detailed test plans for the different modules and top levels
  • Implement scalable test benches including checkers, reference models, assertions in System Verilog
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Collaborate with cross-functional teams such as Design, Model, Emulation and Silicon validation teams towards ensuring design quality targets are met across pre- and post-Silicon product lifecycle
  • Support hand-off and integration of developed subsystems/IP blocks into larger SOC environments
  • Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry
What we offer
What we offer
  • bonus
  • equity
  • benefits
  • Fulltime
Read More
Arrow Right

Principal Silicon Design Verification Engineer

As a Principal Engineer - ASIC verification in the Data Processing Unit team you...
Location
Location
United States , Santa Clara
Salary
Salary:
142800.00 - 304200.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Job Responsibility
Job Responsibility
  • As a Principal Engineer in the Data Processing Unit team, you will be validating silicon to solve complex problems in a datacenter
  • Lead key components of functional validation of complex ASIC SOC using UVM/C test bench
  • Perform pre-silicon SoC verification, post-silicon validation by defining testing strategies
  • Work with cross functional teams, architecture, design, verification, partner teams for project execution and influence next generation designs
  • Develop test plan, C tests and infrastructure to complete functional validation of complex design and report bug/issues
  • Running tests, debugging failures, creating stress and performance scenarios to meet test plan goals
  • Actively participate in chip bring up and write test firmware to support various teams
  • Innovate to improve validation efficiency through methodologies and tools
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right

SOC Verification Manager/Lead

We are seeking an experienced and highly motivated Verification experts to lead ...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 12–20 years of experience in VLSI Design Verification with a strong focus on SoC verification
  • Proven experience in SoC-Level Verification, SoC Verification Architecture, Power Management Verification, Low-Power Verification, Functional Verification and Coverage Closure
  • Strong understanding of SoC architectures involving CPUs, interconnects, memory subsystems, peripherals, and accelerators
  • Expertise in SystemVerilog and UVM-based verification methodologies
  • Hands-on experience with assertion-based verification (SVA)
  • Strong experience with UPF/CPF and power-aware simulation flows
  • Deep understanding of power domains, retention strategies, isolation techniques, level shifters, dynamic voltage and frequency scaling (DVFS), power state management
  • Experience with verification planning, coverage analysis, and regression management
  • Strong debugging skills in complex SoC environments
  • Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field
Job Responsibility
Job Responsibility
  • Define and drive the overall SoC verification strategy for complex multi-billion transistor SoCs
  • Architect and develop scalable, reusable, and robust SoC verification environments using industry-standard methodologies
  • Lead end-to-end verification planning, execution, coverage closure, and sign-off activities
  • Drive power management verification, including validation of power state transitions, power controllers, reset sequencing, clock management, and power domain interactions
  • Lead low-power verification using UPF/CPF methodologies and ensure compliance with low-power design intent
  • Develop and review verification architectures, test plans, assertions, checkers, scoreboards, and coverage models
  • Collaborate closely with architecture, RTL design, firmware, emulation, validation, and physical design teams
  • Drive debug and root-cause analysis of complex SoC-level issues
  • Establish verification best practices, automation frameworks, and verification metrics
  • Support verification across simulation, emulation, FPGA prototyping, and post-silicon validation environments
What we offer
What we offer
  • AMD benefits at a glance
  • Fulltime
Read More
Arrow Right

ASIC DDR Verification Engineer

At AMD, our mission is to build great products that accelerate next-generation c...
Location
Location
India , Hyderabad
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Proven track record in technical leadership of teams with 5+ engineers including planning, execution, tracking, verification closure, and delivery to programs
  • Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS
  • Strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
  • Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management
  • BS w/ 7+ yrs or MS w/ 5+ yrs or PhD w/ 3+ yrs in Electrical Engineering, Computer Engineering or Computer Science
Job Responsibility
Job Responsibility
  • Lead the verification of high-speed Crypto/ cutting-edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance
  • Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level
  • Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs
  • Develop and execute comprehensive verification plans, including testbenches and test cases
  • Collaborate with design, architecture, and software teams to define and implement verification strategies
  • Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification
  • Mentor and guide junior engineers, fostering a collaborative and innovative team environment
  • Fulltime
Read More
Arrow Right