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Lead Platform Emulation Engineer

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AMD

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Location:
India , Bangalore

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Category:
IT - Software Development

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Contract Type:
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Salary:

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Job Description:

The focus of this role is to plan, build, execute the verification, validation/emulation and debug of new and existing features for AMD’s SOCs, resulting in no bugs in the final SOC design and the firmware/BIOS. This senior role will stretch you as you lead emulation team in new directions, network with our world-class, patent-holding think-tank, and negotiate amongst design teams, marketing, and business unit executives.

Job Responsibility:

  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  • Drive Emulation Methodologies, SOC Design Model and Test Architecture for full chip SOC and hybrid models
  • Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  • Estimate the time required to write the new feature tests and any required changes to the test environment
  • Build the directed Pre-Silicon Emulation tests
  • Debug test failures to determine the root cause
  • work with RTL and firmware engineers to resolve design defects and correct any test or infra issues
  • Responsible for writing directed tests to verify features in a co-simulated and emulated/FPGA hardware environment
  • Responsible for writing monitors and checkers to support end-to-end firmware/hardware validation
  • Responsible for running emulator workloads to test new features and debug technical issues using logs, waveform dumps and RTL debug

Requirements:

  • Bachelor’s or Master’s degree in Computer/Electronics/Electrical Engineering with 18+ years of experience
  • Experience with BIOS/OS bring up on full X86 SOC emulation platform
  • Proficient in IP level ASIC verification, experience working with CPU, GPU, and Memory subsystem
  • Proficient in debugging firmware and RTL code using simulation tools
  • Good understanding of PCIe/USB/Ethernet standards
  • safety concepts/IPs
  • Must have hands-on experience on Zebu/Palladium/Veloce platform to bring-up SOC
  • SOC design model build experience
  • Experienced with Verilog, System Verilog, C, and C++
  • Experience in writing and debugging testbenches
  • Scripting language experience: Perl, Ruby, Makefile, shell preferred
  • Experience on debugging SOC IO interfaces with Transactor solutions in Emulation platform
  • Think differently and out of the box to stress the DUT in Emulation platform and verify it in efficient way
  • Should be open to learning verification methodologies and working closely with design, verification, validation, architecture and firmware teams
  • Excellent communication, management, and presentation skills
  • Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies

Additional Information:

Job Posted:
April 16, 2026

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