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Lead IP/SOC Verification

AMD

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Location:
United States, Folsom

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Category:
IT - Software Development

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Contract Type:
Not provided

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Salary:

171200.00 - 256800.00 USD / Year
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Job Description:

In this high-profile role, the Lead IP/SOC Verification will be the overall design verification lead for next generation graphics program. You will work across all of engineering and business to meet overall verification needs

Job Responsibility:

  • Closely work with designers and architect to come up with features, verification and execution plans
  • Own and lead verification quality for GFXIP projects
  • Engage with IP and SOC teams to drive closure to verification strategy
  • Working with architects and verification leads and driving quality test plan specifications
  • Collaborate with architects, hardware engineers, and firmware engineers to understand the complex features and impact to System level/SOC environment
  • Developing verification strategy, infrastructure and needed improvements
  • Driving Pre and post Si verification closure to meet schedule with quality
  • Leading Post Si verification activities to drive triage with FW, SW, IP, SOC and various teams. Plug holes appropriately to improve quality of the IP
  • Working with each domain (sub-system) lead and guide them to get better quality and verification outcome
  • Automating workflows in a distributed compute environment
  • Helping management with risk assessment on features, quality, and schedules
  • This individual will work with engineering management to drive execution excellence, including key metrics - performance, schedule, cost, quality
  • Plan, Execute, Verify and Track new features at IP and SoC level
  • Desire and enthusiasm to grow into leadership role taking progressive responsibility over time
  • Aspiration to grow to technical lead responsible for project level design verification
  • Defines, plans and drives projects and program plans based on management and senior technical guidance
  • Possesses specialized knowledge plus a broader technical knowledge in areas outside his or her area of expertise
  • Has responsibility for projects or processes of significant technical importance and for results that cross engineering project areas
  • Initiates significant changes to existing processes and methods to improve project and team efficiencies

Requirements:

  • Experience focused on IP and/or SOC verification with successful completion of multiple ASICs that are in production
  • Requires proven track record in technical leadership. This includes planning, execution, tracking, verification closure, and delivery to programs
  • Requires strong experience with development of UVM, SystemVerilog, C/C++ and Scripting Languages
  • Requires strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
  • Good understanding of code and functional coverage, ability to influence coverage improvement with design and verification teams
  • Good understanding of requirements management, documentation management, and defect management
  • Ability to grasp concepts during discussions and turn minutes into action items
  • Able to communicate concepts and processes with stakeholders
  • Analytical, self-motivated, organized, detailed-oriented and results-oriented
  • Excellent interpersonal skills including the ability to work well with multiple people and teams, ability to communicate progress to team members on a regular basis
  • Experience working in a high-pressure environment and competing priorities and tight turnaround times
  • Undergrad degree required. Bachelor, Master's or PhD degree in Electrical or Computer Engineering preferred

Nice to have:

  • Prior experience in Graphics domain is highly beneficial, though not a requirement
  • Experience with Processor based SoC verification and understanding of at least one ISA is a plus
  • Experience with gate level simulation, power verification, reset verification, abstraction techniques is a plus
  • Experience with Agile methodology, JIRA and Confluence

Additional Information:

Job Posted:
December 17, 2025

Employment Type:
Fulltime
Work Type:
Hybrid work
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