CrawlJobs Logo

Lead IP/SOC Verification

amd.com Logo

AMD

Location Icon

Location:
United States , Folsom

Category Icon
Category:
IT - Software Development

Job Type Icon

Contract Type:
Not provided

Salary Icon

Salary:

171200.00 - 256800.00 USD / Year
Save Job
Save Icon
Apply Position

Job Description:

In this high-profile role, the Lead IP/SOC Verification will be the overall design verification lead for next generation graphics program. You will work across all of engineering and business to meet overall verification needs

Job Responsibility:

  • Closely work with designers and architect to come up with features, verification and execution plans
  • Own and lead verification quality for GFXIP projects
  • Engage with IP and SOC teams to drive closure to verification strategy
  • Working with architects and verification leads and driving quality test plan specifications
  • Collaborate with architects, hardware engineers, and firmware engineers to understand the complex features and impact to System level/SOC environment
  • Developing verification strategy, infrastructure and needed improvements
  • Driving Pre and post Si verification closure to meet schedule with quality
  • Leading Post Si verification activities to drive triage with FW, SW, IP, SOC and various teams. Plug holes appropriately to improve quality of the IP
  • Working with each domain (sub-system) lead and guide them to get better quality and verification outcome
  • Automating workflows in a distributed compute environment
  • Helping management with risk assessment on features, quality, and schedules
  • This individual will work with engineering management to drive execution excellence, including key metrics - performance, schedule, cost, quality
  • Plan, Execute, Verify and Track new features at IP and SoC level
  • Desire and enthusiasm to grow into leadership role taking progressive responsibility over time
  • Aspiration to grow to technical lead responsible for project level design verification
  • Defines, plans and drives projects and program plans based on management and senior technical guidance
  • Possesses specialized knowledge plus a broader technical knowledge in areas outside his or her area of expertise
  • Has responsibility for projects or processes of significant technical importance and for results that cross engineering project areas
  • Initiates significant changes to existing processes and methods to improve project and team efficiencies

Requirements:

  • Experience focused on IP and/or SOC verification with successful completion of multiple ASICs that are in production
  • Requires proven track record in technical leadership. This includes planning, execution, tracking, verification closure, and delivery to programs
  • Requires strong experience with development of UVM, SystemVerilog, C/C++ and Scripting Languages
  • Requires strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
  • Good understanding of code and functional coverage, ability to influence coverage improvement with design and verification teams
  • Good understanding of requirements management, documentation management, and defect management
  • Ability to grasp concepts during discussions and turn minutes into action items
  • Able to communicate concepts and processes with stakeholders
  • Analytical, self-motivated, organized, detailed-oriented and results-oriented
  • Excellent interpersonal skills including the ability to work well with multiple people and teams, ability to communicate progress to team members on a regular basis
  • Experience working in a high-pressure environment and competing priorities and tight turnaround times
  • Undergrad degree required. Bachelor, Master's or PhD degree in Electrical or Computer Engineering preferred

Nice to have:

  • Prior experience in Graphics domain is highly beneficial, though not a requirement
  • Experience with Processor based SoC verification and understanding of at least one ISA is a plus
  • Experience with gate level simulation, power verification, reset verification, abstraction techniques is a plus
  • Experience with Agile methodology, JIRA and Confluence

Additional Information:

Job Posted:
December 17, 2025

Employment Type:
Fulltime
Work Type:
Hybrid work
Icon
AMD - All Job Offers
Job Link Share:
Copy Link Icon
Facebook Icon Twitter Icon LinkedIn Icon

Looking for more opportunities? Search for other job offers that match your skills and interests.

Briefcase Icon

Similar Jobs for Lead IP/SOC Verification

Principal Engineer, VLSI Design Engineering

Principal Engineer role in VLSI Design Engineering focusing on SOC Verification....
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 8+ Years of relevant Logic Verification experience
  • Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
  • Create verification environment using UVM methodology
  • Create reusable bus functional models, monitors, checkers and scoreboards
  • Drive functional coverage driven verification closure
  • Work with architects, designers, and post-silicon teams
  • Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
  • Development of tools for Design and Verification support
  • Debug failures and root-cause it by interacting with other teams/groups
  • Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Job Responsibility
Job Responsibility
  • Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
  • Create verification environment using UVM methodology
  • Create reusable bus functional models, monitors, checkers and scoreboards
  • Drive functional coverage driven verification closure
  • Work with architects, designers, and post-silicon teams
  • Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
  • Development of tools for Design and Verification support
  • Debug failures and root-cause it by interacting with other teams/groups
  • Fulltime
Read More
Arrow Right

Principal Engineer, VLSI Design Engineering

Job responsibilities: 8+ Years of relevant Logic Verification experience. Able t...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 8+ Years of relevant Logic Verification experience
  • Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
  • Create verification environment using UVM methodology
  • Create reusable bus functional models, monitors, checkers and scoreboards
  • Drive functional coverage driven verification closure
  • Work with architects, designers, and post-silicon teams
  • Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
  • Development of tools for Design and Verification support
  • Debug failures and root-cause it by interacting with other teams/groups
  • Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Job Responsibility
Job Responsibility
  • Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
  • Create verification environment using UVM methodology
  • Create reusable bus functional models, monitors, checkers and scoreboards
  • Drive functional coverage driven verification closure
  • Work with architects, designers, and post-silicon teams
  • Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
  • Development of tools for Design and Verification support
  • Debug failures and root-cause it by interacting with other teams/groups
  • Fulltime
Read More
Arrow Right

Staff Engineer, VLSI Design Engineering

Develop test plans, tests and verification infrastructure for a complex IP/Sub-S...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 5 to 7 years of relevant experience
  • B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
  • Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
  • Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
  • Unit/Sub-system/SOC level verification experience
  • Experience in leading verification closure of complex IP/SOC for at least one project
  • Exposure to industry standard verification tools for simulation and debug
  • RTL & Gate Level Simulations
  • Proficiency in Verilog, System Verilog, Assertions and UVM
  • Exposure to Verification Fundamentals
Job Responsibility
Job Responsibility
  • Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
  • Create verification environment using UVM methodology
  • Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
  • Create reusable bus functional models, monitors, checkers and scoreboards
  • Drive functional coverage driven verification closure
  • Work with architects, designers, and post-silicon teams
  • Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
  • Development of tools for Design and Verification support
  • Debug failures and root-cause it by interacting with other teams/groups
  • Fulltime
Read More
Arrow Right

Staff Engineer, VLSI Design Engineering

Develop test plans, tests and verification infrastructure for a complex IP/Sub-S...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 5 to 7 years of relevant experience
  • B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
  • Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
  • Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
  • Unit/Sub-system/SOC level verification experience
  • Experience in leading verification closure of complex IP/SOC for at least one project
  • Exposure to industry standard verification tools for simulation and debug
  • RTL & Gate Level Simulations
  • Proficiency in Verilog, System Verilog, Assertions and UVM
  • Exposure to Verification Fundamentals
Job Responsibility
Job Responsibility
  • Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
  • Create verification environment using UVM methodology
  • Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
  • Create reusable bus functional models, monitors, checkers and scoreboards
  • Drive functional coverage driven verification closure
  • Work with architects, designers, and post-silicon teams
  • Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
  • Development of tools for Design and Verification support
  • Debug failures and root-cause it by interacting with other teams/groups
  • Fulltime
Read More
Arrow Right

Senior Silicon Engineer

Microsoft is a highly innovative company that collaborates across disciplines to...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 10+ more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s
  • Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++
  • Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
  • Scripting language such as Python or Perl
Job Responsibility
Job Responsibility
  • Own or lead verification of complex flows at the SOC, subsystem, or IP levels
  • Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • innovate to improve verification efficiency through methodologies or tools
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right

Principal Verification Engineer

Microsoft is a highly innovative company that collaborates across disciplines to...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 12+ more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s
  • Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++
  • Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
  • Scripting language such as Python or Perl
Job Responsibility
Job Responsibility
  • Own or lead verification of complex flows at the SOC, subsystem, or IP levels
  • Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • innovate to improve verification efficiency through methodologies or tools
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right

Design Verification Engineer II

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 3+ years of related technical engineering experience OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • Experience in executing pre-silicon verification of IPs/Sub Systems/SoCs through full cycle
  • Background in creating and debugging IP/SoC Level tests in SV-UVM/C
  • In depth knowledge of verification principles, testbenches and stimulus generation
  • Solid understanding of silicon chip and/or computer architecture
  • Scripting language such as Python, Ruby or Perl
Job Responsibility
Job Responsibility
  • Verify/validate silicon or IP to address complex challenges
  • Take the lead in functional verification of advanced IP or ASIC SOC components using a UVM/C test bench
  • Conduct Pre-Silicon IP/SoC verification and Post-Silicon/FPGA validation by establishing effective testing strategies
  • Collaborate with cross-functional teams—including Architecture, Design, Verification, and Partner groups—for project delivery, while also helping shape future designs
  • Create test plans, develop tests and support infrastructure to fully validate intricate designs, and document bugs or issues
  • Execute tests, troubleshoot failures, and devise stress and performance scenarios to achieve test plan objectives
  • Engage in chip bring-up activities and write test firmware to assist other teams
  • Drive innovation by enhancing validation efficiency through new methodologies and tools
  • Embody Microsoft’s core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right
New

Pharmacy Technician

We’re building a world of health around every individual — shaping a more connec...
Location
Location
United States , Drexel Hill
Salary
Salary:
Not provided
https://www.cvshealth.com/ Logo
CVS Health
Expiration Date
June 22, 2026
Flip Icon
Requirements
Requirements
  • Must comply with any state board of pharmacy requirements or laws governing the practice of pharmacy, which includes but is not limited to, age, education, and licensure/certification
  • If the state board of pharmacy does not address or mandate a minimum age requirement, must be at least 16 years of age
  • If the state board of pharmacy does not address or mandate a minimum educational requirement, must have a high school diploma or equivalent, or be actively enrolled in high school or high school equivalency program
  • State-level licensure and national certification requirements vary by state, click here to learn more
  • Regular and predictable attendance, including nights and weekends
  • Ability to complete required training within designated timeframe
  • Attention and Focus
  • Customer Service and Team Orientation
  • Communication Skills
  • Mathematical Reasoning
Job Responsibility
Job Responsibility
  • Living our purpose by following all company SOPs at each workstation to help our Pharmacists manage and improve patient health
  • Following pharmacy workflow procedures at each pharmacy workstation (i.e., production, pick-up, drive-thru, and drop-off) for safe and accurate prescription fulfillment
  • Contributing to positive patient experiences by showing empathy and genuine care
  • Completing basic inventory activities, as permitted by law, and as directed by the pharmacy leadership team
  • Contributing to a high-performing team, embracing a growth mindset, and being receptive to feedback
  • Remaining flexible for both scheduling and business needs, while contributing to a safe, inclusive, and engaging team dynamic
  • Understanding and complying with all relevant federal, state, and local laws, regulations, professional standards, and ethical principles
  • Delivering additional patient health care services (e.g., immunizations, point-of-care testing, and voluntarily staffing offsite clinics), where allowable by law and supported by required training and certification
  • Where permissible, the Pharmacy Technician may also support immunizations, which includes the following responsibilities: Completing additional licensure and training requirements, in compliance with state Board of Pharmacy regulations, to obtain Technician Immunizer status to support preparing and administering vaccines
  • Educating patients about the importance of vaccines and referring patients to the Pharmacist-on-duty for vaccination questions
What we offer
What we offer
  • medical, dental, and vision coverage
  • paid time off
  • retirement savings options
  • wellness programs
  • and other resources, based on eligibility
  • Fulltime
Read More
Arrow Right