Lead ASIC - FPGA Design Engineer Job at Boeing (Bengaluru)

Job Description

At Boeing, we innovate and collaborate to make the world a better place. We’re committed to fostering an environment for every teammate that’s welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Overview: As a leading global aerospace company, Boeing develops, manufactures and services commercial airplanes, defense products and space systems for customers in more than 150 countries. As a top U.S. exporter, the company leverages the talents of a global supplier base to advance economic opportunity, sustainability and community impact. Boeing’s team is committed to innovating for the future, leading with sustainability, and cultivating a culture based on the company’s core values of safety, quality and integrity. Technology for today and tomorrow: The Boeing India Engineering & Technology Center (BIETC) is a 5500+ engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IIoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.

Job Responsibility

Lead complex FPGA/SoC design from concept to production
Own FPGA Architecture development and design strategy across the projects
Define FPGA design methodologies, coding standards and best practices
Lead the RTL development (using Verilog / SystemVerilog) efforts
Lead and mentor a team of FPGA engineers, drive design reviews and help in capability building
Proactively manage risks, dependencies and plan effective mitigations
Demonstrates problem solving skills to resolve technical issues on architectural approaches, requirements, specifications and design
Drives the design quality, KPI measures, documentation and compliance to industry standards such as DO-254 (DAL A/B/C/D as applicable) or equivalent
Leads activities in support of Supplier Management with make/buy recommendations and other technical services
Effectively collaborate with cross functional teams and leadership
Evaluates and integrates third-party IP and verification IP (VIP)
Stay ahead on new technologies and standard processes
Deliver upon Stage Gate Reviews, establish processes and drive design excellence
Conducts technical training, allocates tasks, review deliverables and ensures productivity
Possess strong ownership and accountability, has ability to influence and drive technical decisions
Excellent problem-solving, analytical thinking and communication skills
Coordinates engineering support throughout the lifecycle of the product
Plans research projects to develop concepts for future product designs to meet projected requirements
Works under minimal direction

Requirements

Bachelor degree in Engineering, Engineering Technology (including Manufacturing Technology), Electronics, Electrical, Computer Science, Data Science, Mathematics, Physics, Chemistry, or non-US equivalent qualifications directly related to the work statement
Proven experience in RTL design using Verilog/System Verilog and perform synthesis, place & route, timing closure and optimization
Experience on high-speed interfaces design such as PCIe, DDR, Ethernet, SerDes, etc.
Proven experience in designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.)
Experience deriving digital ASIC/FPGA requirements specification from higher-level (system or board-level) requirements specifications
Experience in designing robust testbench and performing code coverage analysis
Work experience performing RTL synthesis, clock cross domain analysis (CDC), Static Timing Analysis and correcting timing violations
Experience using Version Control Systems: Subversion (SVN), CVS, Git or equivalent
Support hardware and software teams in board bring-up, debugging & troubleshooting activities, and system level issues resolution
FPGA Tools: Xilinx Vivado, Intel Quartus or equivalent
Education/experience typically acquired through advanced education (e.g. Bachelor) and typically 12 to 16 years of related work experience in FPGA design and development in aerospace/automotive/telecom & networks or equivalent
Bachelor's Degree or Equivalent Required

Nice to have

Masters or Specialization in Microelectronics or Embedded Systems Design is preferred
Strong understanding of DO-254 lifecycle and processes
Ability to drive innovation and process improvements
Strong knowledge of requirements management tools such as DOORS, etc.
Strong understanding of system-level designs involving multiple IPs
Ability to interface hard IP with custom RTL (AXI, Ethernet or equivalent interfaces)
Strong understanding of parameterization and reusable IP design

What we offer

Competitive base pay and incentive programs
Industry-leading tuition assistance program pays your institution directly
Resources and opportunities to grow your career
Up to $10,000 match when you support your favorite nonprofit organizations

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Lead ASIC - FPGA Design Engineer

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