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Hsio Enablement Lead

India, Bangalore · Job Posted May 28, 2026
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Job Description

We are looking for a dynamic, energetic and a strong technical leader to join our growing team. As a key contributor to the success of AMD’s product, you will be part of a dynamic team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The Systems Design Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. As a Lead for HSIO Enablement in the Post silicon side, you will be completely responsible for the end-to-end enablement of High Speed interfaces functional aspects including all the sub-system analysis, the complete features coverage of all High Speed IPs, and BIOS/FW/Driver dependency aspects.

Job Responsibility

  • Own the Enablement activities for NPI and ensure all the silicon related features and system specific features are enabled properly for robustness & consistency of quality
  • Timely closure of deliverables and actively work with the Validation team, Program Managers, Stakeholders and the SoC design teams to maintain a healthy execution
  • Be able to influence SoC teams for improvement or innovation in the process
  • Excellent up-levelling skills to highlight the key activities/risks/updates to senior management
  • Develop functional validation plans for Ethernet, PCIe, Display, USB interfaces, align cross-functional teams (BIOS/firmware) on the support and validation plans
  • Drive debug in post silicon pertaining to HSIO enablement especially Ethernet, root-cause problems and steer the team to the best corrective action to move forward
  • Able to work as a team and work efficiently in a dynamic environment and on multiple projects
  • Develop scripts in python & automate test cases/debug scripts

Requirements

  • Over 15 years of experience
  • Extensive and solid experience in enabling HSIOs for x86 environment with high emphasis on Ethernet
  • Solid understanding of Post Silicon fundamentals and x86 high speed architectures
  • Proven track record in SOC enablement charter
  • CPU Machine Check architecture and related error handling/recovery through SOC resets
  • Hands-on experience with RAS use-cases for HSIO
  • Strong fundamentals pertaining to Industry standards
  • Must be extremely self-driven and be able to motivate junior team members to bring out productive, collaborative atmosphere
  • Ability to apply knowledge of other high-speed, high-performance memory technologies
  • Exposure to critical customer use-case debugging
  • Experience in creating comprehensive Enablement test plans covering system-level scenarios
  • Experience in customer engagement and support is required
  • Experience in debugging across SOC – IP, silicon, emulation is required
  • Experience in requirements gathering, tracking, and execution
  • Good grasp of SW/FW layers
  • Good grasp of embedded systems and Networking & Storage markets
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