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Head of Physical Design

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Etched

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Location:
United States , San Jose

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Contract Type:
Not provided

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Salary:

200000.00 - 300000.00 USD / Year

Job Description:

We’re looking for a Head of Physical Design to lead the end-to-end RTL-to-GDSII path for our next-generation transformer inference ASICs. You’ll own all aspects of physical implementation — from floorplanning and synthesis through P&R and signoff — and lead a world-class team of PD engineers to deliver first-pass silicon that’s fast, reliable, and production-ready. This is a rare opportunity to shape the physical design strategy at a company where timing to market and uncompromising performance are critical to success.

Job Responsibility:

  • Own and optimize all facets of physical design, including floorplanning, placement, CTS, routing, and timing closure for complex AI accelerators
  • Build and lead a high-performing PD team, including engineers focused on implementation, flows, and signoff
  • Define and drive physical signoff strategy, ensuring DRC, LVS, ERC, and CDC are achieved with margin
  • Partner closely with RTL, DV, backend, and methodologies teams to ensure seamless integration and handoff across the stack
  • Guide block-level and chip-level floorplanning with input on timing budgets, power domains, and interconnect strategy
  • Drive early architecture and microarchitecture input to reduce rework and enable schedule predictability
  • Interface with EDA vendors and the foundry to integrate cutting-edge tools, flows, and node-specific optimizations
  • Lead the development of automation scripts (e.g., Python, Tcl) to accelerate design cycles and increase flow robustness
  • Create telemetry and dashboards to track design health and ensure accurate KPIs across closure milestones
  • Deliver fast, production-grade silicon through aggressive, high-confidence planning and execution

Requirements:

  • 10+ years of experience in physical design for advanced-node ASICs, including multiple successful tapeouts
  • Demonstrated ownership of complex block- and full-chip physical implementation projects, from RTL handoff to signoff
  • Deep expertise in timing closure, including STA, path analysis, constraint management, and ECO optimization
  • Experience managing and mentoring physical design teams, ideally in fast-paced or startup environments
  • Strong scripting and automation skills (Python, Tcl) to optimize workflows and improve engineering velocity
  • Familiarity with leading EDA tools like Cadence Innovus, Synopsys ICC2, and Mentor Calibre
  • Comfort working in a high-performance, in-person engineering culture that values ambition and execution
What we offer:
  • Medical, dental, and vision packages with generous premium coverage
  • $500 per month credit for waiving medical benefits
  • Housing subsidy of $2k per month for those living within walking distance of the office
  • Relocation support for those moving to San Jose (Santana Row)
  • Various wellness benefits covering fitness, mental health, and more
  • Daily lunch + dinner in our office

Additional Information:

Job Posted:
February 18, 2026

Employment Type:
Fulltime
Work Type:
On-site work
Job Link Share:

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