This list contains only the countries for which job offers have been published in the selected language (e.g., in the French version, only job offers written in French are displayed, and in the English version, only those in English).
Join a Custom Layout team driving advanced silicon design, with strong focus on AI-enabled workflows. You will work with designers, CAD engineers, and global teams to develop layouts while adopting AI tools to improve engineering productivity. This role combines hands-on layout experience with exposure to agentic workflows and automation. You will help modernize daily engineering work using AI-driven approaches.
Job Responsibility:
Develop layout for analog/mixed-signal circuits and run DRC/LVS checks
Follow design rules and collaborate with designers to improve layout quality
Support tapeout, debugging, and daily layout activities
Use AI tools and agentic workflows to improve productivity
Contribute to AI agent usage, including workflow and memory setup
Requirements:
Bachelor's Degree in Electrical / Electronic Engineering or related field
Coursework or project exposure in IC design or layout is a plus
Exposure to IC layout or CMOS concepts
Familiar with Cadence Virtuoso or similar tools
Basic understanding of DRC/LVS and scripting (Python/Skill/Tcl)
Exposure to agentic workflow creation (AI agent-based automation)
Awareness of agentic memory creation (knowledge capture / reuse)
Nice to have:
Coursework or project exposure in IC design or layout is a plus