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As Signal Integrity Design Engineer, you will be responsible for SI specification definition, modeling, analysis and verification for products. You will be part of an engineering team to work on the current and next generation product performance verifications. You will lead/participate projects involving the modeling, design, verification, measurements of Signal Integrity of current and future AMD server products. You will work closely with multiple teams across IC Design, Layout, Packaging, Board, Product Engineer, Test Development, Application, Technical Service and Software to address the SIPI requirement from die, package to board level.
Job Responsibility
Work closely with cross-functional team and internal working group on current and next gen Server's platform in meeting signal integrity in HVM solution space
Electromagnetic modeling of 3-D structures including vias, connectors, sockets
Verify and correlate post-silicon measurement against spec and collaborate fixes if needed to feedback on the next derivation silicon
Collaborate with working group leads for signal measurement test plans and review of measurement results
Deliver channel optimization (board and package), model creation and verification and simulate the overall performance to meet the channel performance
Be part of the team to develop and enhance next generation product and methodology
Board/system-level power delivery network AC+DC simulation for low-voltage/ high-current supplies
Work with external and internal IP providers to ensure IPs performance and their proper functionality in our products
System-level signal integrity simulations of future DDR5 memory bus including silicon IO, package, and board
System-level signal integrity simulations of future high-speed SERDES links such as USB-4, PCIe5, xGMI/CXL, etc. including silicon IO, package, and board
Resolve challenges in the areas of high-speed board design, power and analog
Requirements
Bachelor's or Master's in electrical engineering, computer engineering, or comparable disciplines
Electromagnetic modeling of 3-D structures including vias, connectors, sockets
System-level signal integrity simulations of DDR5 memory bus
System-level signal integrity simulations of high-speed SERDES links such as USB-4, PCIe5, xGMI/CXL
Expertise in analog simulation with Seasim, S2eye, Hspice, ADS, ANSYS, or other toolsets
Expertise in 3-D modeling with ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE
Expertise with DSO, TDR, VNA, ParBERT measurement tools/techniques
Nice to have
Hands on experience in either Silicon design or board design will be highly advantageous
High motivation to continuously learn and resolve new challenges