This list contains only the countries for which job offers have been published in the selected language (e.g., in the French version, only job offers written in French are displayed, and in the English version, only those in English).
Geologics is seeking a Secret Cleared FPGA Engineer who will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaborative modeling of algorithms, partition and perform code development, simulation, and place and route. Designs are verified against requirements using both directed test and constrained random methodologies.
Job Responsibility:
Design support is expected from requirements definition through integration and test
Design documentation and configuration management are required
Design and deliver production quality FPGA releases from initial proof of concept up to production
Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
Translate system level requirements into FPGA requirements
Design and code in VHDL for reliability and maintainability
Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
Help drive projects and execute to program schedules on time and budget
Create complete documentation including requirements, verification plan, and user's guides
May support internal and external technical reviews
Requirements:
Active Secret Clearance
Bachelor of Science in Computer or Electrical Engineering and a minimum of 2 - 8+ years of experience to include at least 1 of the following: Digital design and VHDL coding
Xilinx or Microsemi devices and flow tools
Delivering FPGA solutions to system level applications
Hands on experience with integration and debug
Ability to attain Special Program Access (SAP)
Nice to have:
FPGA design experience in one or more of the following areas: Radar processing techniques
Image processing techniques for visual and infrared sensors
Embedded systems design using ARM, Microblaze, or Nios processors
Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
Constrained random verification in UVM using System Verilog
Verification utilizing emulation platforms, such as Veloce