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As an Emulation Verification Engineer in AMD's Server SoC team, you'll be at the forefront of validating next-generation server-class SoCs using advanced emulation platforms. Your mission: ensure AMD's silicon hits the ground running—bug-free, high-performance, and server-grade reliable.
Job Responsibility
Bring-up and debug of large SoC designs on emulation platforms (e.g., Palladium, Veloce, Zebu)
Develop and execute test plans to validate functionality, performance, and power on emulators
Create and integrate monitors, checkers, and assertions in SystemVerilog/UVM environments
Collaborate with cross-functional teams including RTL design, architecture, firmware, and post-silicon validation
Analyze failures, root-cause bugs, and drive fixes in pre-silicon environments
Maintain and enhance emulation infrastructure and workflows
Requirements
Strong experience in SystemVerilog, UVM, and emulation platforms
Proficiency in debugging tools and scripting languages like Python, Perl, or TCL
Familiarity with RTL design (Verilog/VHDL) and simulation tools
Solid understanding of SoC architecture, memory protocols, and interface standards
Familiarity with Gate level emulation in emulation platforms (e.g., Palladium, Veloce, Zebu)
Bachelors or Masters degree in computer engineering/Electrical Engineering