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AMD Logo AMD · IT - Software Development

Emulation Engineer

India, Hyderabad · Job Posted April 05, 2026
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Job Description

The Core design and verification team is responsible for development of ‘High performance and Ultralow power x86 microprocessor core’. The role provides a unique opportunity to work at the micro-architectural level of the next-gen Core, with exposure to designs that defines the next wave of client (laptops/ultra-books/think-clients) and custom designs. The multi-billion gate complexity and high-frequency (GHz) design development gives the learning experience of the latest and greatest design and verification methodologies, using cutting edge advanced technology nodes.

Job Responsibility

  • Verification of high performance x86-core ISA features
  • Architecting and development of testbench, test-bench components for high performance Cache, x86 ISA features, clock/reset/power features of processor
  • Development of detailed test plans and driving the execution of test plan, including functional coverage
  • Understanding the existing test bench setup and look for opportunities to improve the existing test bench
  • Adhering to coding guideline practices, develop and implement code review process
  • Collaborate with global design verification teams and drive effectively the execution of the verification plans
  • Your commitment to innovating as a team demonstrated through excellent communication, knowledge of proper documentation techniques, and independently driving tasks to completion

Requirements

  • Master’s degree preferred with emphasis in Electrical/Electronics Engineering, Computer Engineering, or Computer Science with a focus on computer architecture
  • Strong understanding the design and verification life cycle
  • Hands on verification experience with C/C++/SystemVerilog testbench development
  • Hands on experience with coverage planning, coding and coverage closure
  • Experience with x86, ARM or any other industry standard microprocessor ISA
  • Experience with Cache, Coherency and Data-Consistency verification
  • Experience in clocking, reset, power-up sequences and power management verification

Nice to have

  • Knowledge of microprocessor design-for-debug (DFD) logic will be a plus
  • Understanding of low power design verification techniques is a plus
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