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Lead the electrical packaging design of our next-generation optical communication products, bridging advanced chip integration with manufacturable, high-reliability solutions. As an Electrical Packaging Engineer at Salience Labs, you will be responsible for driving the design and delivery of complex electrical packaging solutions for our photonic and electronic modules. This is a critical role in shaping our products as they transition from R&D into high-volume production. You will lead the packaging deliverable, working closely with our optical packaging, hardware, and manufacturing partners to ensure robust, high-yield solutions that meet performance, thermal, and reliability requirements. This role blends deep technical expertise in electrical packaging with the ability to manage deliverables, coordinate suppliers, and anticipate manufacturing challenges. You will take a hands-on approach while also owning the strategic planning and execution for packaging activities. The ideal candidate has worked across both design and production environments, understands the nuances of large-scale chip packaging, and is motivated to help define how next-generation optical systems are packaged, tested, and brought to market.
Job Responsibility:
Lead the definition, design, and execution of electrical packaging solutions for photonic-electronic modules
Collaborate with optical packaging, manufacturing and hardware teams to integrate mechanical, thermal, and electrical requirements
Specify and oversee interposer designs, substrate layouts, and attachment methodologies
Own packaging deliverables from concept to production, including supplier coordination, documentation, and verification
Define and execute test plans for thermal performance, mechanical stress, reliability, and compliance
Troubleshoot packaging challenges, develop mitigation strategies, and drive yield improvements
Work closely with manufacturing partners, both locally and overseas, to ensure manufacturability and cost efficiency
Requirements:
Strong background in electrical packaging for large-scale semiconductor devices, including substrate and interposer design
Experience with high bump-count, large-area chip packaging and associated manufacturing workflows
Proven ability to manage packaging deliverables, including supplier engagement and cross-functional coordination
Knowledge of mechanical stress, warpage, thermal management, and yield improvement techniques
Comfortable working hands-on with prototypes and in a lab environment
Excellent communication skills, able to convey technical requirements to internal teams and suppliers
Nice to have:
Have experience integrating photonic and electronic packaging in a single module
Are familiar with advanced packaging techniques, such as 2.5D interposers, chip-on-substrate, or wafer-level packaging
Have worked with suppliers oversees and understand international manufacturing processes
Bring experience from both design engineering and production/manufacturing environments
Have led packaging projects from concept through to successful product launch
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