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As a Senior Systems Design Engineer, you will be a hands-on technical owner for platform deployment and availability in a live data center setting. You’ll work directly with cutting-edge GPU/CPU systems, diagnosing complex hardware, firmware, power, thermal, networking, and clustering issues that occur at scale. This role offers deep exposure to how next-generation compute platforms behave in production, close collaboration with cross-functional engineering teams and external partners, and the opportunity to drive continuous improvements that directly impact system reliability and uptime.
Job Responsibility:
Manage platform deployment, availability, and stability for data center CPU/GPU systems
Lead system-level debugging efforts involving hardware, firmware, Linux, networking, power, and thermal behavior
Develop structured debug strategies, validation flows, and failure-analysis methodologies
Track daily activities, prioritize issues, assign work, and monitor progress to resolution
Collaborate with silicon, firmware, validation, networking, and operations teams to assess risks and requirements
Execute hands-on laboratory validation to ensure systems operate as intended prior to and during deployment
Partner with OEMs, ODMs, and vendors to resolve issues and improve platform reliability
Drive continuous improvement in tools, processes, and platform readiness
Requirements:
Bachelor’s degree preferred in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field
Advanced degree desired but not required
Systems engineering experience supporting complex CPU, GPU, or SoC-based platforms
Platform or system-level validation, bring-up, or design reliability experience
Debugging expertise across BIOS, BMC, Linux, and hardware interfaces
Familiarity with test automation and failure-analysis methodologies
Experience working with OEM, ODM, or hardware vendors
Knowledge of high-speed interconnects such as PCIe Gen5
Hands-on experience using hardware lab equipment (e.g., scopes, programmers, system bring-up tools)
Exposure to FPGA, CPLD, or firmware development environments
Nice to have:
Advanced degree desired but not required
Knowledge of high-speed interconnects such as PCIe Gen5
Exposure to FPGA, CPLD, or firmware development environments
What we offer:
Benefits offered are described: AMD benefits at a glance.