This list contains only the countries for which job offers have been published in the selected language (e.g., in the French version, only job offers written in French are displayed, and in the English version, only those in English).
Lead the research, proposal, and architectural definition of Instruction Set Architecture (ISA) features and extensions for next-generation high-performance CPU cores
Conduct in-depth Performance, Power, and Area (PPA) trade-off analysis for ISA design choices
Utilize architectural simulators to perform detailed performance analysis on key workloads, validating and optimizing ISA decisions
Author and maintain ISA specification documentation (e.g., Programmer's Reference Manual)
Collaborate closely with Microarchitecture, Compiler/Software, and Verification teams to ensure seamless ISA implementation and toolchain support
Requirements:
M.S. or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related field
8+ years of industry experience in CPU architecture design, specifically focusing on Instruction Set Architecture (ISA) development and optimization
Demonstrable, hands-on experience with the design or extension of a major ISA (RISC-V, Arm, or x86)
Expert-level knowledge of modern CPU microarchitectural concepts, including out-of-order execution, memory hierarchy, and cache mechanisms
Proficiency with architectural performance simulators (e.g., Gem5) and modeling tools
Excellent C/C++ programming and scripting skills (e.g., Python)
Strong understanding of compiler-ISA interaction and its impact on software enablement
What we offer:
Globally recognized technology company with a stable, large platform
Currently experiencing rapid growth and business expansion
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