CPU Design Verification Architect Job at AMD (Bangalore)

CPU Verification Engineer - Unit DV

The person will be part of AMD's CPU Performance Validation team. This team is p...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Strong understanding of out-of-order execution, memory ordering, and cache coherence
Proficiency in SystemVerilog, UVM, C++, Python
Experience with x86, ARM, or RISC-V architectures
Familiarity with simulation tools (VCS, Verilator), waveform debugging, and scripting
Excellent problem-solving and communication skills
Excellent inter-personal, communication skills and ability to work in a fast-paced exciting environment
Should be a self-learner and always ready to upgrade his/her skills
Experienced verification engineer with deep expertise in high-performance CPU verification
Proven track record in developing scalable verification environments, driving coverage closure, and collaborating across architecture, RTL, and post-silicon teams

Job Responsibility

Architect and implement unit-level verification environments using C++/SystemVerilog/UVM
Develop detailed test plans for functional and performance verification of Load/Store, Scheduler, and Execute Units
Create directed and random stimulus, checkers, and coverage models
Debug simulation failures and collaborate with RTL designers to resolve issues
Drive coverage closure and ensure high-quality tape-out readiness
Support emulation and post-silicon validation efforts
Mentor junior engineers and contribute to verification best practices

Head of Design Verification, Interface IP

We are hiring a Head of Design Verification – Interface IP to own and scale veri...

Location

United States , San Jose

Salary:

200000.00 - 300000.00 USD / Year

Etched

Expiration Date

Until further notice

Requirements

10+ years of design verification experience with ownership of complex IP or SoC subsystems
Deep hands-on expertise in SystemVerilog and UVM
Strong understanding of SoC mCPU design and high-speed interfaces (PCIe, Ethernet, AXI/AMBA)
Tape-out experience with final DV sign-off responsibility
Systems-level DV mindset
Comfortable being hands-on in a fast-moving startup environment

Job Responsibility

Own end-to-end DV strategy and sign-off for Interface IP across Etched SoCs
Act as the technical authority on correctness, protocol compliance, performance, and robustness
Lead DV for CPU subsystems (boot, interrupts, coherency, system control)
Lead DV for high-speed interfaces, including throughput and latency verification
Architect and evolve SystemVerilog/UVM verification environments
Drive vendor IP integration, configuration reviews, and verification gap closure
Partner closely with architecture, RTL, SoC DV, and software teams
Hire, mentor, and lead a small, high-impact Interface IP DV team
Advise the strategy and execution of emulation testing for pre-silicon validation

What we offer

Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office

Fulltime

Principal Design Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Mountain View

Salary:

139900.00 - 274800.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
9+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems
5+ years’ industry experience of chip and/or computer architecture
5+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl
CPU or Graphics core verification experience
In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure

Job Responsibility

Creation of complex verification environments and tests, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation
Interact with architects and design engineers to create verification plans covering strategy, test environments & tests, and verification requirements for IP/SS/SOC level verification
Create and drive test-plans and test development to provide complete features coverage
Develop and implement technical solutions to complex quality and design challenges
Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage
Triage and debug testbench, simulation, and emulation fails
Develop Makefiles and scripts for scalable and efficient verification
Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment
Collaborate with teams across sites and geographies

Fulltime

CPU Formal Verification Engineer

Responsible for verifying latest gen complex Ryzen CPU clusters/blocks using for...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Bachelor’s, Master’s, or Ph.D. in Computer Engineering, Electrical/Electronic Engineering, Computer Science, or related field
5–10 years exp in formal verification for logic/microarchitecture IP— preferably CPU-related
Proven experience using formal engines (e.g. JasperGold, VC Formal) for bug hunting
Skilled in assertion languages (SystemVerilog Assertions) and HDL modeling (Verilog/VHDL/SV)
Strong scripting or programming ability (Python, Tcl, Perl)
Analytical mindset with intellectual curiosity
ability to uncover hidden verification gaps
Exceptional communicator and collaborator in cross-functional environments
Mentorship or technical ownership experience—leading reviews and guiding junior engineers

Job Responsibility

Perform formal verification (model checking, equivalence checking) on CPU microarchitecture/IP blocks
Develop formal proofs, abstraction models, and convergence methodologies to maximize coverage and bug hunting
Generate comprehensive formal verification plans: scope, coverage goals, strategy, and proof approaches
Lead ROI analysis to balance formal vs. dynamic methodologies
Work with architects, RTL designers, and verification teams to resolve failing assertions and improve design quality
Look for potential sign-off for critical blocks to guarantee exhaustive proof and reduce silicon escapes
Support post-silicon failure debug and sighting resolution when required
Maintain and enhance formal infrastructure (flows, abstraction techniques, tools)
Investigate new formal techniques and define reusable verification methodologies for the team

Sr Server Performance Architect

AMD is looking for an outstanding technical contributor to help architect, valid...

Location

United States , Austin

Salary:

178400.00 - 267600.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Should have executed Emulation based functional and performance verification for multimillion gate SoC designs
Should have strong exposure to RTL coding and SOC bringup debug
Exceptional foundation in systems architecture, cutting across CPU, memory, storage and I/O subsystems
Experience with hardware performance counter monitoring tools
Should have exposure to performance profiling tools, preferably x86 based (e.g. linux perf, Windows perfmon)
MS/PhD in Computer Engineering / relevant coursework / thesis
Excellent communication skills (verbal, written, and presentation)
12 years relevant industry experience

Job Responsibility

Team Leadership
Program Leadership
Performance Analysis & Correlation
Toolchain & Methodology
AI-Driven Infrastructure
Cross-Functional Collaboration
Stakeholder Management
Industry Awareness

Fulltime

Server Performance Architect

AMD is looking for an outstanding technical contributor to help architect, valid...

Location

United States , Austin

Salary:

121680.00 - 182520.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Should have executed Emulation based functional and performance verification for multimillion gate SoC designs
Should have strong exposure to RTL coding and SOC bring-up debug
Exceptional foundation in systems architecture, cutting across CPU, memory, storage and I/O subsystems
Experience with hardware performance counter monitoring tools
Should have exposure to performance profiling tools, preferably x86 based (e.g. linux perf, Windows perfmon)
MS/PhD in Computer Engineering / relevant coursework / thesis
Excellent communication skills (verbal, written, and presentation)
> 4 years relevant industry experience

Job Responsibility

Develop and execute performance verification plans targeting IPC, latency, throughput, and power efficiency
Capability to debug performance outliers through Performance Monitoring Counters (PMC)
Drive correlation between RTL and performance models, ensuring architectural intent is met
Analyze performance bottlenecks using simulation, emulation, and silicon data
Build and maintain scalable, modular performance verification infrastructure
Provide emulation-based performance setup and debug, enabling early performance validation
Integrate performance regression, profiling, and analysis flows using industry-standard and custom tools
Collaborate with compiler and OS teams to ensure software stack alignment with hardware performance goals
Drive the development of AI/ML-based infrastructure to automate performance analysis, anomaly detection, and efficiency improvements
Leverage data-driven techniques to optimize verification coverage and reduce debug cycles

What we offer

Benefits offered are described: AMD benefits at a glance

Fulltime

PMTS Silicon Design Engineer

We are seeking a seasoned SoC Architect with expertise or significant interest i...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security
Experience analyzing CPU, GPU or System-level Micro-Architectural features to identify performance bottlenecks within different workloads
Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture, logic design, and circuit levels
Excellent communication, management, and presentation skills
Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies
Bachelor's or Master's degree in related discipline preferred

Job Responsibility

Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams
Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all features, optimizing for performance and power
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
Knowledge sharing and other contributions to Platform & System Architecture
As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests
Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs
Support Post-Si teams for Product Performance, Power and functional issues debug/resolution

Fulltime

PMTS Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING. At AMD, our mission is to build great pro...

Location

China , Shanghai

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security
Experience analyzing CPU, GPU or System-level Micro-Architectural features to identify performance bottlenecks within different workloads
Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture, logic design, and circuit levels
Excellent communication, management, and presentation skills
Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies
Bachelor's or Master's degree in related discipline preferred

Job Responsibility

Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams
Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all features, optimizing for performance and power
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
Knowledge sharing and other contributions to Platform & System Architecture
As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests
Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs
Support Post-Si teams for Product Performance, Power and functional issues debug/resolution

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CPU Design Verification Architect

Job Description

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