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We are looking for a Chip Lead to take full technical ownership of our next silicon program from architecture through production. This role is for a senior, hands-on leader who has shipped complex chips and is comfortable being the final technical authority on key decisions. You will act as the single threaded owner of the chip, setting technical direction, reviewing designs in detail, and driving the organization to a successful tapeout, bring-up, and production ramp.
Job Responsibility:
Own the silicon from architecture definition through RTL, physical design, tapeout, bring-up, and production
Be accountable for the chip meeting performance, power, area, quality, cost, and schedule targets
Serve as the final technical escalation point for all chip-level issues
Define and review the top-level SoC architecture, including block partitioning, interconnects, clocks/resets, power domains, and interfaces
Drive key architectural and microarchitectural tradeoffs and ensure alignment with system-level requirements
Ensure robustness, testability, and manufacturability are built into the design from the start
Actively review RTL, verification plans, physical design closure, DFT, and test strategy
Challenge assumptions and drive simplification where possible
Hold a high bar for design quality, correctness, and clarity
Drive technical readiness for tapeout
Make clear go/no-go calls and tradeoff decisions when necessary
Lead post-silicon bring-up and debug, working closely with firmware, software, and validation teams
Drive rapid learning on first silicon and lead root-cause analysis for issues
Partner with manufacturing and test teams on yield, reliability, and production ramp
Own the transition from first silicon to stable, high-volume production
Work directly with foundries, OSATs, and IP vendors on technical execution
Collaborate closely with system, board, and product teams to ensure silicon success
Communicate technical status, risks, and decisions clearly to leadership
Requirements:
10+ years of semiconductor design experience
Proven experience shipping at least one complex SoC or ASIC into production
Strong technical depth across the full silicon lifecycle, including: SoC architecture and microarchitecture, RTL design and verification, Physical design, timing, power, and closure, DFT, test, yield, and reliability, Post-silicon bring-up and debug
Ability to dive deep into details while maintaining chip-level perspective
Strong technical judgment and ownership mindset
Nice to have:
Prior experience as a Chip Lead, SoC Lead, or senior technical lead at a top-tier semiconductor company
Experience with high performance compute, AI accelerators, or large-scale SoCs
Experience with advanced nodes and/or advanced packaging
Familiarity with CoWoS or other 2.5D/3D packaging technologies
What we offer:
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more