Asic verification lead Job at Eviden (Bangalore)

Asic Verification Lead

Eviden is searching for a Asic Verification Lead to join our dynamic team.

Location

Spain , Madrid or Barcelona

Salary:

Not provided

Eviden

Expiration Date

Until further notice

Requirements

8+ years experience
Bachelor's Degree (BE / BTech) or Master's Degree (ME / MTech)
Integrating ASIC functional verification team
Experience with ASIC developed include network controller, router and cache coherence controller targeting Bull high-end servers and Bull high-performance ('big data' and 'exascale') servers
Using 'Constraint-Random, Coverage Driven' functional verification methodologies underlying UVM verification framework to ensure full and effective verification of complex ASIC
Participated in the successful verification of a complex SoC or ASIC
Mastering UVM or equivalent verification methodology

Job Responsibility

Acquire knowledge of the architecture and microarchitecture of the ASIC by studying specifications and interacting with the architecture and logical design teams
Participate in defining overall verification strategies and methodologies, and the required simulation environments. Develop, maintain and publish verification specifications
Write and perform closely test plans with the logical design team
Develop coverage models and verification environments using UVM-SystemVerilog / C ++
Monitor, analyze and debug simulation errors
Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time
Submit recommendations on tools and methodologies to develop to improve productivity
Mentor junior engineers on how to produce a maintainable and reusable code across projects

ASIC Verification - Team Lead

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Santa Clara

Salary:

139900.00 - 274800.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
Experience working with large verification projects, including cluster/subsystem and fullchip environments
Ability to lead large scale verification execution, driving multiple senior level verification engineers across geographic regions towards project completion
Develop comprehensive pre-silicon verification test plans based on design specifications and performance requirements
Create and maintain UVM/SystemVerilog-based testbenches for block-level, cluster-level, fullchip and emulation verification
Comfortable and experienced with AI based tools to accelerate productivity

Job Responsibility

Pre-Silicon Verification
Improves verification efficiency through new and updated methodologies or tools
Defines verification strategies and test plans
Owns verification of complex flows at the system on chip (SoC), subsystem (SS), or intellectual property (IP) levels
Drives the development of verification environments, runs, and debugs simulations to drive quality
Influences the product life cycle from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff
Leads application of random-stimulus, coverage, formal verification, or other verification techniques to find bugs and meet test plan goals
Performance
Works collaboratively with various teams to define performance modeling requirements and ensure technology development planning meets needs
Determines type of performance model needed and appropriate model fidelity

Fulltime

DDR Lead Verification Engineer

The focus of this role is to plan, build, and execute the verification of new an...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Proficient in IP level ASIC verification
Proficient in debugging RTL code using simulation tools
Experience with memory controllers, dfi, dram memory models(ddr4/5, lpddr4/5, hbm, NVDIMM) and/or ddr phys is added advantage
ASIC design verification experience with 7+Years
Hands on experience in developing complex UVC
Good debugging skill and good knowledge of verification tool and methodology
Hands on experience with coverage planning, coding, and coverage closure
Should have worked on developing testplan at module level/IP level /Chip-level project
Mentoring Juniors and ensuring that the team achieves technical goals with high quality
Scripting language experience: Perl, Ruby, Makefile, shell preferred

Job Responsibility

Collaborate with architects, hardware engineers to understand the new features to be verified
Build test plan documentation, accounting for interactions with other features
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the directed and random verification tests
Debug test failures to determine the root cause
work with RTL engineers to resolve design defects and correct any test issues
Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

Fulltime

Senior Lead Verification Engineer (Leadership role)

The Infinity Fabric transport layer verification team is looking for an experien...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Proficient in IP or Sub-system level ASIC verification
Architected and developed complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar
Exposure to RTL design, software development, formal verification, or other related domains
Experience in UVM TestBench Development for complex designs preferred
15+ years of industry experience is preferred
Bachelor’s or master’s degree in Electronics or Electrical or Computer engineering

Job Responsibility

Develop and enhance System Verilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects
Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture
Understand TestBench Architecture and develop expertise in TestBench Verification Components
Mentor junior engineers

Design Verification Lead

The CIT team is a dynamic and innovative team dedicated to pushing the boundarie...

Location

Serbia , Belgrade

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Extensive hardware verification experience
Must be proficient in Verilog, System Verilog, UVM, and working in Linux and Windows environments
Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation tools
Must have excellent programming skills
Must have exposure to Makefile and other scripting languages like Perl, Python and Ruby
Electrical Engineering or Computer Engineering education

Job Responsibility

Closely work with architects and designers to develop verification strategies and execution plans
Participate in the verification of complex IP blocks, take end to end ownership of key features for all projects
Work on test plans, test case development, testbench enhancement, regression, and coverage closure
Deploying industry-leading verification methodologies, such as UVM and Formal Verification
Developing testbenches and verification components such as UVCs, models, BFMs, and re-usable verification environments
Writing, modifying, and maintaining constraint-random and directed test cases and libraries in System Verilog/UVM
Analyzing functional, code, and test plan coverage
Implementing assertions, checkers, and monitors
Triaging and debugging regressions
Reproducing functional bugs found in silicon, in simulation and/or Formal Verification tools

GPU/GFX IP - Verification Lead

We are currently seeking a highly skilled verification engineer for GFX Verifica...

Location

India , Hyderabad

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Min 8 years of experienced in ASIC verification
Must be proficient in Verilog and System Verilog language
Must be good at C/C++ programming and working in Linux and Windows environments
Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools and do test plan, test creation and triage, coverage, and assertion etc
Be proficient of script language like Perl, Python
Must demonstrate strong analytical thinking and problem-solving skills with an excellent attention to detail
Must have good English hearing, speaking, reading, and writing capabilities
Must have good teamwork and interpersonal skills
Must be a self-starter, and able to independently drive tasks to completion
Good teamwork and communications skills are required

Job Responsibility

Working with all partners such as lead architects and block design teams to understand features to be implemented and verified
Developing robust test plan for both synthetic testing and real workload trace
Debug verification test failures, working with the design team to accurate defects
Make sure AMD next generation GFXIP can meet performance/power/function expectation

Asic Verification Engineer

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...

Location

United States , Roseville

Salary:

153500.00 - 310500.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
6-10 years of experience in VLSI design, verification, or implementation
Experience with scripting languages (Python, PERL, TCL or equivalent)
Experience with software programming languages (C
C++)
Experience with Verilog/System Verilog
Proficient in UVM methodologies
Expert level proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
Expert level analytical and problem solving skills
Expert level knowledge of designing VLSI components, integrated circuitry, architectures and algorithms into VLSI solutions

Job Responsibility

Provide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing
Reviews and evaluates designs and project activities for compliance with VLSI technology and development guidelines and standards
provides tangible feedback to improve product quality
Provides VLSI-specific and technical expertise along with the overall architecture design and platform leadership to cross-organization projects, programs, and activities
Provides leadership of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence
Participates in and provides input on process for selection of future technical leaders
Drives VLSI innovation and integration of new technologies into projects and activities in the design organization

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

Senior ASIC verification Engineer

We are looking for a new ASIC Verification Engineer to become part of the future...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
6-10 years of experience in VLSI design, verification, or implementation
Expert level proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
Expert level analytical and problem solving skills
Expert level knowledge of designing VLSI components, integrated circuitry, architectures and algorithms into VLSI solutions
Expert level knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
Experience in executive written and verbal communication skills
mastery in English and local language
Subject matter expertise or discipline leadership as evidenced through patents/publications in the field of VSLI or Electronic/hardware component designs and tools

Job Responsibility

Provide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing
Reviews and evaluates designs and project activities for compliance with VLSI technology and development guidelines and standards
provides tangible feedback to improve product quality
Provides VLSI-specific and technical expertise along with the overall architecture design and platform leadership to cross-organization projects, programs, and activities
Provides leadership of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence
Participates in and provides input on process for selection of future technical leaders
Drives VLSI innovation and integration of new technologies into projects and activities in the design organization

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

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Asic verification lead

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