Asic Verification Lead Job at Eviden (Madrid or Barcelona)

Lead IP/SOC Verification

In this high-profile role, the Lead IP/SOC Verification will be the overall desi...

Location

United States , Folsom

Salary:

171200.00 - 256800.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Experience focused on IP and/or SOC verification with successful completion of multiple ASICs that are in production
Requires proven track record in technical leadership. This includes planning, execution, tracking, verification closure, and delivery to programs
Requires strong experience with development of UVM, SystemVerilog, C/C++ and Scripting Languages
Requires strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
Good understanding of code and functional coverage, ability to influence coverage improvement with design and verification teams
Good understanding of requirements management, documentation management, and defect management
Ability to grasp concepts during discussions and turn minutes into action items
Able to communicate concepts and processes with stakeholders
Analytical, self-motivated, organized, detailed-oriented and results-oriented
Excellent interpersonal skills including the ability to work well with multiple people and teams, ability to communicate progress to team members on a regular basis

Job Responsibility

Closely work with designers and architect to come up with features, verification and execution plans
Own and lead verification quality for GFXIP projects
Engage with IP and SOC teams to drive closure to verification strategy
Working with architects and verification leads and driving quality test plan specifications
Collaborate with architects, hardware engineers, and firmware engineers to understand the complex features and impact to System level/SOC environment
Developing verification strategy, infrastructure and needed improvements
Driving Pre and post Si verification closure to meet schedule with quality
Leading Post Si verification activities to drive triage with FW, SW, IP, SOC and various teams. Plug holes appropriately to improve quality of the IP
Working with each domain (sub-system) lead and guide them to get better quality and verification outcome
Automating workflows in a distributed compute environment

Fulltime

Senior ASIC verification Engineer

We are looking for a new ASIC Verification Engineer to become part of the future...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
6-10 years of experience in VLSI design, verification, or implementation
Expert level proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
Expert level analytical and problem solving skills
Expert level knowledge of designing VLSI components, integrated circuitry, architectures and algorithms into VLSI solutions
Expert level knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
Experience in executive written and verbal communication skills
mastery in English and local language
Subject matter expertise or discipline leadership as evidenced through patents/publications in the field of VSLI or Electronic/hardware component designs and tools

Job Responsibility

Provide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing
Reviews and evaluates designs and project activities for compliance with VLSI technology and development guidelines and standards
provides tangible feedback to improve product quality
Provides VLSI-specific and technical expertise along with the overall architecture design and platform leadership to cross-organization projects, programs, and activities
Provides leadership of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence
Participates in and provides input on process for selection of future technical leaders
Drives VLSI innovation and integration of new technologies into projects and activities in the design organization

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

ASIC Digital Design Engineering Lead

Idaho Scientific designs and deploys secure system solutions through novel CPU d...

Location

United States , Boise; Salt Lake City

Salary:

Not provided

Idaho Scientific

Expiration Date

Until further notice

Requirements

US Citizenship (no exceptions)
Proven work experience designing and fabricating an ASIC (no exceptions)
Ability to get a security clearance
Solid technical background with at least 5 years of experience in FPGA or ASIC product development
Team leadership experience
Ability to communicate clearly in person and in written documentation
Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
Strong analytical and problem solving skills
Extreme attention to detail

Job Responsibility

Lead a team of digital design engineers to create a security system on a chip
Collaborate with team members and across teams to explore and clearly identify real problems and solutions
Develop and define the microarchitecture of new Idaho Scientific IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions
Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages
Integrate complex systems that instantiate both Idaho Scientific and third party IP
Contribute to all aspects of design success from specification to production
Apply our state-of-the-art IP to ASIC and FPGA products in the real world
Define and improve high-quality design methods and processes
Mentor and guide other ASIC design engineers

What we offer

Competitive Pay
Flexible Work Schedule
Health Benefits and Insurance
Retirement fund contributions
Profit Sharing
Generous Paid Time Off Policy

Fulltime

ASIC Engineer Staff

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...

Location

India , Bangalore

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

MSEE or BSEE is required
At least 5 years of ASIC Verification Experience
ASIC Verification using SystemVerilog
Experience in constrained-random verification
Experience with verification methodology like OVM/VMM/UVM
Perl/Tcl scripting
Experience verifying networking protocols such as Ethernet
Strong problem solving and ASIC debugging skills

Job Responsibility

Provide technical expertise and lead project teams of Electronic and VLSI engineers
Review and evaluate designs for compliance with VLSI technology guidelines
Provide VLSI-specific expertise to cross-organization projects
Provide leadership to project teams of VLSI engineers
Provide guidance and mentoring to less experienced staff
Drive VLSI innovation and integration of new technologies
Architect and develop block level verification environments using System Verilog and UVM methodology
Define, architect, code, and deliver verification suites/tests for ASICs
Verify large ASIC blocks independently and sign off for tape-out
Work closely with logic designers to resolve bugs and software developers

What we offer

Health & Wellbeing benefits
Personal & Professional Development programs
Unconditional Inclusion environment
Comprehensive suite of benefits supporting physical, financial and emotional wellbeing

Fulltime

Senior VLSI/ASIC Verification Engineer

Verifies, Designs, analyzes, develops, modifies and evaluates VLSI/ASIC componen...

Location

United States , Roseville

Salary:

130500.00 - 300000.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
6-10 years of experience in VLSI design, verification, or implementation
Expert level proficiency in electrical engineering fundamentals, VLSI/ASIC principles, digital logic, and computer architecture
Expert level analytical and problem solving skills
Expert level knowledge of designing VLSI/ASIC components, integrated circuitry, architectures and algorithms into VLSI/ASIC solutions
Expert level knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
Coursework in VLSI/ASIC design or VLSI/ASIC concepts
Experience in executive written and verbal communication skills
mastery in English and local language
Subject matter expertise or discipline leadership as evidenced through patents/publications in the field of VSLI or Electronic/hardware component designs and tools.

Job Responsibility

Provide technical expertise and leads project teams of Electronic and VLSI/ASIC engineers and internal and outsourced development partners responsible for all stages of VLSI/ASIC design and development for complex products, solutions, and platforms, including design, validation, and testing
Reviews and evaluates designs and project activities for compliance with VLSI/ASIC technology and development guidelines and standards
provides tangible feedback to improve product quality
Provides VLSI/ASIC-specific and technical expertise along with the overall architecture design and platform leadership to cross-organization projects, programs, and activities
Provides leadership of project team of other VLSI/ASIC engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI/ASIC prototypes and products
Provides guidance and mentoring to less experienced staff members to set an example of VLSI/ASIC design and development innovation and excellence
Participates in and provides input on process for selection of future technical leaders
Drives VLSI/ASIC innovation and integration of new technologies into projects and activities in the design organization.

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

New

ASIC Verification - Team Lead

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Santa Clara

Salary:

139900.00 - 274800.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
Experience working with large verification projects, including cluster/subsystem and fullchip environments
Ability to lead large scale verification execution, driving multiple senior level verification engineers across geographic regions towards project completion
Develop comprehensive pre-silicon verification test plans based on design specifications and performance requirements
Create and maintain UVM/SystemVerilog-based testbenches for block-level, cluster-level, fullchip and emulation verification
Comfortable and experienced with AI based tools to accelerate productivity

Job Responsibility

Pre-Silicon Verification
Improves verification efficiency through new and updated methodologies or tools
Defines verification strategies and test plans
Owns verification of complex flows at the system on chip (SoC), subsystem (SS), or intellectual property (IP) levels
Drives the development of verification environments, runs, and debugs simulations to drive quality
Influences the product life cycle from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff
Leads application of random-stimulus, coverage, formal verification, or other verification techniques to find bugs and meet test plan goals
Performance
Works collaboratively with various teams to define performance modeling requirements and ensure technology development planning meets needs
Determines type of performance model needed and appropriate model fidelity

Fulltime

Principal Engineer, ASIC Development Engineering (RTL Design)

We are seeking a highly skilled and experienced Principal Engineer to join our A...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BE or Master's in Electronics or Electrical Engineering, Computer Engineering, or a related field
8+ years of experience in ASIC development, with a proven track record of leading complex project
Hands on in IP / blocks / subsystem complex design in verilog / sysverilog
Strong digital design development and execution skills , solving bugs
Experience in grooming team of 1-4 engineers, interacting with many team
Deep expirience in debug , solving problem, see the architecture view, proposing solutions.
Hands-on experience with industry-standard EDA tools and design flows
Deep knowledge on PCIe, axi , DMA, AHB interfaces
Expertise in high-performance and low-power design techniques
Excellent communication skills, both verbal and written, with the ability to articulate complex technical concepts clearly

Job Responsibility

Design and implements IPs and subsystems
Dealing the best of class IPs for all SanDisk products

Fulltime

Manager Silicon Design Engineering

AMD seeks a passionate, collaborative leader with strong technical skills and th...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

10 to 15 years of experience in digital ASIC/SOC design verification
4 to 5 years manager experiences on ASIC/SOC design and verification
Experience working with a distributed team
Strong mentoring and coaching skills
Proven experience managing and leading engineering teams
Prior experience in optimizing performance (client, server, system, or embedded)
Strong system and software engineering background
Strong communications skills
Strong analytic and problem-solving skills
Must be a self-starter and self-motivated

Job Responsibility

Lead a high-performance engineering team
Form a team and nurture talents
Lead team, meet schedule commitments and provide strong support to various SoC
Collaborate with multi-functional leaders to drive AMD's success

Asic Verification Lead

Eviden

Location:
Spain , Madrid or Barcelona

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
January 31, 2026

Looking for more opportunities? Search for other job offers that match your skills and interests.

Similar Jobs for Asic Verification Lead

Lead IP/SOC Verification

Senior ASIC verification Engineer

ASIC Digital Design Engineering Lead

ASIC Engineer Staff

Senior VLSI/ASIC Verification Engineer

ASIC Verification - Team Lead

Principal Engineer, ASIC Development Engineering (RTL Design)

Manager Silicon Design Engineering

Asic Verification Lead

Eviden

Location:Spain , Madrid or Barcelona

Category:IT - Software Development

Contract Type:Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:January 31, 2026

Looking for more opportunities? Search for other job offers that match your skills and interests.

Similar Jobs for Asic Verification Lead

Lead IP/SOC Verification

Senior ASIC verification Engineer

ASIC Digital Design Engineering Lead

ASIC Engineer Staff

Senior VLSI/ASIC Verification Engineer

ASIC Verification - Team Lead

Principal Engineer, ASIC Development Engineering (RTL Design)

Manager Silicon Design Engineering

Location:
Spain , Madrid or Barcelona

Category:
IT - Software Development

Contract Type:
Not provided

Job Posted:
January 31, 2026