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ASIC Verification Engineer

India, Bangalore · Job Posted February 21, 2026
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Job Description

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions.

Job Responsibility

  • Architect and Develop block level verification environments for sub-system and full chip using System Verilog and UVM methodology
  • Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems
  • Verify large ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage and Gate level simulation
  • Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development
  • Develop Perl, Python and/or shell scripts to improve current verification infrastructure/methodology

Requirements

  • ASIC Verification using System Verilog
  • Experience in constrained-random verification is a strong plus
  • Experience with verification methodology like OVM/VMM/UVM
  • Perl/Tcl scripting is strongly preferred
  • Experience verifying networking protocols such as Ethernet is desirable
  • Strong problem solving and ASIC debugging skills
  • MSEE or BSEE is required with 5 plus of experience

Nice to have

  • Experience in constrained-random verification
  • Perl/Tcl scripting
  • Experience verifying networking protocols such as Ethernet

What we offer

  • Health & Wellbeing
  • Personal & Professional Development
  • Unconditional Inclusion

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