ASIC Top Level Verification

• SoC level testcase development with possibilities to specialize in special areas related to traffic on external interfaces and/or ASIC internal functionality involving DSPs, MCUs, CPU cores, ARM infrastructure, switches, security, SerDes, DDR and other types of external memory and much more
• Preparing and setting up designs to run in Hardware Emulators, and update and maintain existing emulator platforms
• Participate in defining/documenting verification strategies for the parts of the ASIC assigned to you as a verifier
• Participate in specification and development of software driven tests written in C
• Debug RTL designs with help of EDA simulation tools and SW debuggers
• Debug failing test cases using the SystemC/TLM platform or using the hardware emulator
• Debug failing test cases running on any of our other run-platforms, SystemC/TLM simulation, Hardware emulation and on Silicon mounted on boards in the lab
• Contribute to keeping tests clean in the CI regression running on our four platforms

• Solid C programming skills targeting ASICs or other type of embedded software programming
• Solid skills in RTL debugging issues in simulations of SystemVerilog or VHDL designs
• Using SW debuggers, waveforms windows etc. for HW/SW co-debugging of C-code running in the ASIC
• GLS
• Coresight and other JTAG TAP related features
• Compiling designs for HW emulation
• Formal connectivity verification
• High speed interfaces like Ethernet, PCIe, CPRI
• ARM CPUs/cores, SMMU
• AMBA interconnect, preferably using Cadence STG or IWB
• Open, inclusive mindset, embracing diversity in culture, nationality, gender, etc.
• Collaborative approach, with a focus on team productivity and mutual growth
• Strong drive for innovation, with a proactive interest in refining verification methodologies
• Clear communication skills for effective teamwork and coordination across diverse teams

Experience of multi core designs is a plus