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As an ASIC Microarchitect, you will play a key role in designing and implementing state-of-the-art digital systems, SoCs, and high-performance RISC-V cores. You will collaborate closely with systems, software, and hardware design teams, as well as the physical implementation team, to architect microarchitectures that optimize power, performance, and area (PPA). We are looking for an innovative thinker who balances pragmatic engineering solutions with breakthrough ideas that push the boundaries of what’s possible.
Job Responsibility:
Architect, design, and implement high-performance, low-power, and area-efficient digital designs for ASICs and SoCs using industry-standard EDA tools
Work closely with the physical implementation team to conduct power, performance, and area experiments, evaluating and optimizing different microarchitecture trade-offs
Collaborate with performance modelling team to model functionality and explore performance optimizations, ensuring alignment with product requirements
Engage with systems and software teams to ensure seamless integration and functionality from design through verification
Drive technical innovation by exploring emerging technologies and methodologies, particularly within the RISC-V ecosystem
Actively participate in design reviews, code reviews, and contribute to continuous improvement of design methodologies
Develop and specify microarchitectures, ensuring great documentation and fostering a culture of collaborative design
Optimize microarchitectures through innovative design techniques while balancing power, performance, and area trade-offs
Requirements:
Bachelor’s in Computer Engineering or Electrical Engineering
5+ years of experience with microprocessor architecture work culminating in several successful implementations
Familiarity with processor architecture, memory and cache subsystems, on-chip interconnects and network-on-chip technology, AXI, …etc
Knowledge of RISC-V architectures is a strong plus
Strong programming skills in Python, C/C++, Chisel or assembly language is highly desirable
Experience with fixed and floating point arithmetic and data path design is desirable
Passion for learning new technologies
Taking pride in always producing high quality code and documentation
Excellent communication skills
Comfortable and willing to work with team members from different disciplines, different levels and across time-zones
Nice to have:
Knowledge of RISC-V architectures
Strong programming skills in Python, C/C++, Chisel or assembly language
Experience with fixed and floating point arithmetic and data path design
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