ASIC Intern Job at Hewlett Packard Enterprise (Roseville)

Asic Intern

Aruba, a Hewlett Packard Enterprise Company, designs and delivers Mobility-Defin...

Location

United States , Roseville

Salary:

35.00 - 40.25 USD / Hour

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Currently pursuing a Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering or a related technical field
At least 3rd Year of engineering courses completed
Basic programming or scripting knowledge (e.g., Verilog, SystemVerilog Python, PERL, TCL, C, C++)
Experience with hardware design
Strong interest in high-tech and a passion for learning
Excellent communication and interpersonal skills
Strong problem-solving and analytical skills
Ability to work within a team environment

Job Responsibility

RTL/Physical Design
Pre-Silicon verification
Post-Silicon verification
Formal Verification
Script &/or Tool development
schedule breakdowns
document generation

What we offer

Health & Wellbeing
Comprehensive suite of benefits
Personal & Professional Development programs
Unconditional Inclusion

Fulltime

ASIC Design Intern

Students pursuing their university degree. Assists in various tasks aligned with...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Artificial Intelligence knowledge (concepts and projects)
Problem solving
Debugging
Communication, both written and verbal
Ability to interact with both hardware and software teams
Multitasking
HDLs
VLSI and physical design knowledge is a plus

Job Responsibility

Work with RTL level design based on an architecture or microarchitecture specification
Develop infrastructure and Proof of Concept for Artificial Intelligence usage and optimization
Optimization of current methodologies for RTL convergence using AI concepts
RTL and Infrastructure detailed debug
Write documentation and specifications for certain designs
Collaborate with different teams across the organization to make sure Quality of deliverables meets the needs of design teams

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Parttime

Asic verification engineering intern

An exciting internship opportunity to make an immediate contribution to AMD's ne...

Location

Canada , Ottawa

Salary:

65000.00 CAD / Year

AMD

Expiration Date

Until further notice

Requirements

3rd/4th year Computer Engineering or Computer Science students
Understanding of digital design principles
Understanding of Object Oriented Coding practices
Experience with Systemverilog, C or C++ programming languages
Experience with Python, Perl or other scripting languages is an asset

Job Responsibility

Contribute to the development of advanced Systemverilog-UVM based verification environments and IP components
Write tests, sequences, and testbench components in SystemVerilog and UVM to achieve verification of the design
Learn to employ a Coverage-Driven Verification methodology with Constrained Random Stimulus
Review and contribute to verification plans and design specifications
Contribute to process improvements via automation of tasks and exploring and evaluating new tools and methodologies
Investigate and root cause issues found during the IP development stage

Fulltime

ASIC Emulation Engineer - Infra Silicon Enablement

Meta is hiring ASIC Engineers within the Infrastructure organization. We are loo...

Location

India , Bangalore

Salary:

Not provided

Meta

Expiration Date

Until further notice

Requirements

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
6+ years of experience with ASIC development cycles, Pre/Post Silicon Validation
6+ years of experience with troubleshooting, debug and analytics for Silicon products
Experience in Python, C/C++ and/or similar languages (data structures, algorithms, and OOP)
Experience working with internal and external partners for ASIC and/or systems development
Experience in ASIC Design or Development, Emulation and Post Silicon validation

Job Responsibility

Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions. From early architecture and design inputs, pre-silicon test readiness/validation, post-silicon bring-up, validation, characterization and deployment in fleet
Create/develop validation plan, tests and automation tool sets targeted at silicon validation and productization. Inclusive of, but not limited to silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center deployments
Understand production system use cases to improve silicon validation
Provide feedback into next generation architecture and design with insights from the production fleet
Root-cause, resolve and remediate issues with silicon across the product lifecycle
Lead end-to-end silicon validation effort, driving strategy, planning, execution, and post-silicon enablement to ensure successful product delivery

ASIC Engineer, Infra Silicon Pre/Post Silicon Validation

Meta is hiring ASIC Engineers within the Infrastructure organization. We are loo...

Location

United States , Sunnyvale

Salary:

178000.00 - 250000.00 USD / Year

Meta

Expiration Date

Until further notice

Requirements

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
8+ years of experience with ASIC development cycles, Pre/Post Silicon Validation
8+ years of experience with troubleshooting, debug and analytics for Silicon products
Experience in Python, C/C++ and/or similar languages (data structures, algorithms, and OOP)
Experience working with internal and external partners for ASIC and/or systems development
Experience in ASIC Design or Development, Emulation and Post Silicon validation

Job Responsibility

Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions. From early architecture and design inputs, pre-silicon test readiness/validation, post-silicon bring-up, validation, characterization and deployment in fleet
Create/develop validation plan, tests and automation tool sets targeted at silicon validation and productization. Inclusive of, but not limited to silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center deployments
Understand production system use cases to improve silicon validation
Provide feedback into next generation architecture and design with insights from the production fleet
Root-cause, resolve and remediate issues with silicon across the product lifecycle
Lead end-to-end silicon validation effort, driving strategy, planning, execution, and post-silicon enablement to ensure successful product delivery

What we offer

bonus
equity
benefits

ASIC Engineer - Infra Silicon Enablement

Meta is hiring ASIC Engineers within the Infrastructure organization. We are loo...

Location

India , Bangalore

Salary:

Not provided

Meta

Expiration Date

Until further notice

Requirements

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
6+ years of experience with FW Development, ASIC development cycles, Pre/Post Silicon Validation
6+ years of experience with troubleshooting, debug and analytics for Silicon products
Experience in Python, C/C++ and/or similar languages (data structures, algorithms, and OOP)
Experience working with internal and external partners for ASIC and/or systems development
Experience in ASIC Design or Development, Emulation and Post Silicon validation

Job Responsibility

Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions. From early architecture and design inputs, pre-silicon test readiness/validation, post-silicon bring-up, validation, characterization and deployment in fleet
Create/develop validation plan, validation FW/SW, tests and automation tool sets targeted at silicon validation and productization. Inclusive of, but not limited to silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center deployments
Understand production system use cases to improve silicon validation
Provide feedback into next generation architecture and design with insights from the production fleet
Root-cause, resolve and remediate issues with silicon across the product lifecycle
Lead end-to-end silicon validation effort, driving strategy, planning, execution, and post-silicon enablement to ensure successful product delivery

Silicon Physical Design Engineer

Meta’s mission is to give people the power to build community and bring the worl...

Location

United States , Sunnyvale

Salary:

178000.00 - 250000.00 USD / Year

Meta

Expiration Date

Until further notice

Requirements

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
8+ years of experience in ASIC Physical Design
Understanding of RTL2GDSII flow and design tapeouts in 3nm or below process technologies
Experience with low power implementation, power gating, multiple voltage rails, UPF knowledge
Experience working with EDA tools like Fusion Compiler, ICC2/Innovus, Primetime, RedHawk
Experience with Python, TCL, Perl programming

Job Responsibility

Develop and own physical design implementation of multi-hierarchy low-power ML Hardware design including physical-aware logic synthesis, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes
Resolve design and flow issues related to physical design, identify potential solutions, and drive execution
Collaborate with ML architects and designers to understand the ML workloads and develop custom physical design methodologies and recipes to optimize the PPA of ML compute datapath design blocks
Work across disciplines, brainstorm big ideas, work in new technology areas, juggle/coordinate multiple initiatives, drive a concept into a prototype and ultimately guide the transition into a high-volume consumer product
Travel both domestically and internationally

What we offer

bonus
equity
benefits

Fulltime

ASIC Engineer Intern, Design

Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organi...

Location

India , Bangalore

Salary:

Not provided

Meta

Expiration Date

Until further notice

Requirements

Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields
Knowledge of Verilog or System Verilog or HLS
Knowledge of Computer Architecture and Logic Design fundamentals
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
Intent to return to degree-program after the completion of the internship/co-op

Job Responsibility

Participate in Micro-architecture, Design, and Verification reviews and provide feedback
Design and develop RTL or HLS code for some of the IPs
Analyze designs and enhance PPA (Power, Performance, Area)
Support and develop Verification Infrastructure, analyze and improve Verification Coverage
Support Simulation accelerators and post-Silicon validation

ASIC Intern

Hewlett Packard Enterprise

Location:
United States , Roseville

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
March 13, 2026

Looking for more opportunities? Search for other job offers that match your skills and interests.

Similar Jobs for ASIC Intern

Asic Intern

ASIC Design Intern

Asic verification engineering intern

ASIC Emulation Engineer - Infra Silicon Enablement

ASIC Engineer, Infra Silicon Pre/Post Silicon Validation

ASIC Engineer - Infra Silicon Enablement

Silicon Physical Design Engineer

ASIC Engineer Intern, Design

ASIC Intern

Hewlett Packard Enterprise

Location:United States , Roseville

Category:IT - Software Development

Contract Type:Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:March 13, 2026

Looking for more opportunities? Search for other job offers that match your skills and interests.

Similar Jobs for ASIC Intern

Asic Intern

ASIC Design Intern

Asic verification engineering intern

ASIC Emulation Engineer - Infra Silicon Enablement

ASIC Engineer, Infra Silicon Pre/Post Silicon Validation

ASIC Engineer - Infra Silicon Enablement

Silicon Physical Design Engineer

ASIC Engineer Intern, Design

Location:
United States , Roseville

Category:
IT - Software Development

Contract Type:
Not provided

Job Posted:
March 13, 2026