Asic Intern Job at Hewlett Packard Enterprise (Roseville)

ASIC Intern

ASIC Post-Si Verification Engineering Intern to join our team in Roseville, CA. ...

Location

United States , Roseville

Salary:

35.00 - 40.25 USD / Hour

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Currently pursuing a Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering or a related technical field
At least 3rd Year of engineering courses completed
Basic programming or scripting knowledge (e.g., Verilog, SystemVerilog Python, PERL, TCL, C, C++)
Experience with hardware design
Strong interest in high-tech and a passion for learning
Excellent communication and interpersonal skills
Strong problem-solving and analytical skills
Ability to work within a team environment

Job Responsibility

Working with the HPE Aruba ASIC development team on next generation products
Having a summer project that will be used for/in the development activities of current or future ASIC's
Working with and learning from the senior members of the ASIC / VLSI team
Responsibilities may include RTL/Physical Design, Pre-Silicon verification
Post-Silicon verification
Formal Verification
Script &/or Tool development
schedule breakdowns, document generation, and several other possible duties

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Analog and Mixed Signal ASIC Design Intern

Teradyne’s Semiconductor Test Division at our Agoura Hills, CA facility is looki...

Location

United States , Agoura Hills

Salary:

25.50 - 47.00 USD / Hour

Teradyne

Expiration Date

Until further notice

Requirements

Currently working towards their BSEE/MSEE degree with emphasis on mixed-signal and analog integrated circuit design
Analog and/or Mixed-Signal integrated circuit design knowledge
Cadence EDA tools, Spectre, Hspice
Programming and Scripting, C++, VBA, Python
Knowledge working with lab equipment - oscilloscopes, DMM, etc.
Excellent written and verbal communication skills
Detail-oriented and possess excellent follow-up skills
Ability to work independently with minimal direction
Must be available for a min of 3 months Summer 2026

Job Responsibility

Assist design engineers in developing specifications for analog blocks
Assist design engineers to optimize and characterize a circuit via simulation (with Cadence EDA tools) over all process and operating conditions
Take part in the Physical implementation (layout) of circuits
Participate in documentation
Be part of the design review
Participate in IC evaluation in the lab

Fulltime

ASIC Engineer Intern, Design

Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organi...

Location

India , Bangalore

Salary:

Not provided

Meta

Expiration Date

Until further notice

Requirements

Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields
Knowledge of Verilog or System Verilog or HLS
Knowledge of Computer Architecture and Logic Design fundamentals
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
Intent to return to degree-program after the completion of the internship/co-op

Job Responsibility

Participate in Micro-architecture, Design, and Verification reviews and provide feedback
Design and develop RTL or HLS code for some of the IPs
Analyze designs and enhance PPA (Power, Performance, Area)
Support and develop Verification Infrastructure, analyze and improve Verification Coverage
Support Simulation accelerators and post-Silicon validation

Asic engineer intern, design verification

Meta is seeking an ASIC Engineer Intern to join our Infrastructure organization....

Location

India , Bangalore

Salary:

Not provided

Meta

Expiration Date

Until further notice

Requirements

Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields
Knowledge of Computer Architecture and Logic Design fundamentals
Experience thinking critically and creatively on how to verify designs, solve problems
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
Intent to return to degree-program after the completion of the internship/co-op

Job Responsibility

Develop tests, checkers and coverage to help verify designs
Develop understanding of the architecture and microarchitecture of designs
SystemVerilog/UVM/C code to generate test content
Develop scripts to automate various processes
Debug test failures, work with design, verification and modeling teams to fix and verify the fixes
Help improve verification processes and contribute to methodology

ASIC Engineer Intern - Infra Silicon Enablement

Meta is seeking an ASIC Engineering Intern to join our Release to Production Eng...

Location

India , Bangalore

Salary:

Not provided

Meta

Expiration Date

Until further notice

Requirements

Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields
Completed Coursework in Computer architecture and/or Electrical engineering
Experience with troubleshooting, debug and analytics for Silicon products
Experience in Linux, Python, C/C++ and/or similar languages (data structures, algorithms, and OOP)
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
Intent to return to a degree-program after the completion of the internship/co-op

Job Responsibility

Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions - from early architecture and design inputs, pre-silicon validation, bring-up and post-silicon characterization and deployment in fleet
Create/develop validation and automation tool sets targeted at silicon validation and productization - inclusive of, but not limited to silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center deployments
Understand production system use cases to improve validation
Provide feedback into next generation architecture and design with insights from the production fleet
Root-cause, resolve and remediate issues with silicon across the product lifecycle

ASIC Design Intern

Students pursuing their university degree. Assists in various tasks aligned with...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Artificial Intelligence knowledge (concepts and projects)
Problem solving
Debugging
Communication, both written and verbal
Ability to interact with both hardware and software teams
Multitasking
HDLs
VLSI and physical design knowledge is a plus

Job Responsibility

Work with RTL level design based on an architecture or microarchitecture specification
Develop infrastructure and Proof of Concept for Artificial Intelligence usage and optimization
Optimization of current methodologies for RTL convergence using AI concepts
RTL and Infrastructure detailed debug
Write documentation and specifications for certain designs
Collaborate with different teams across the organization to make sure Quality of deliverables meets the needs of design teams

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Parttime

ASIC Engineer Intern, Architecture

Meta is seeking an ASIC Engineer Intern, Architecture to join our Infrastructure...

Location

United States , Sunnyvale

Salary:

6660.00 - 11647.00 USD / Month

Meta

Expiration Date

Until further notice

Requirements

Currently has, or is in the process of obtaining, a Master's Degree in Electrical Engineering, Computer Engineering or related areas
Programming skills in C, C++ or related Object Oriented Programming
Knowledge of Computer Architecture concepts such as processor architecture, memory systems and on-chip interconnection networks
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment

Job Responsibility

Work on advanced architecture, algorithms and models targeting either video compression or Machine Learning solutions
Analyze and map data center workloads to ASIC architecture
Develop performance and functional models to validate the architecture
Implement and analyze algorithms and enhanced architecture for the data center accelerators
Implement various models needed for the validation of the accelerators

ASIC Engineer Intern, Implementation

Meta is seeking an ASIC Engineer Intern to join our Infrastructure organization....

Location

United States , Sunnyvale

Salary:

6660.00 - 11647.00 USD / Month

Meta

Expiration Date

Until further notice

Requirements

Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields
Knowledge of Verilog, VHDL, or HLS
Knowledge of Computer Architecture and Logic Design fundamentals
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
Intent to return to degree-program after the completion of the internship/co-op

Job Responsibility

Participate in Design Implementation, Physical Design, and Design Power reviews and provide feedback
Contribute to optimizing RTL for some of the IPs to achieve best PPA (Power, Performance, Area), and support implementation and physical design of the same
Develop scripts, tools, and methods to enhance PPA (Power, Performance, Area)
Support and develop EDA Infrastructure, and help improve designer productivity
Support Simulation accelerators and post-Silicon validation

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