CrawlJobs Logo

ASIC Firmware Engineer, Modeling

United States, San Francisco 226000.00 - 445000.00 USD / Year · Job Posted February 21, 2026
Apply Position
Job Link Share

Job Description

OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI. We are looking for an embedded engineer to help build firmware and associated modeling software for OpenAI’s in house AI accelerator. This role involves designing and developing drivers and functional models for a large array of HW components, writing high throughput and low latency firmware code, investigating bring-up and production issues.

Job Responsibility

  • Design and implement drivers for hardware peripherals, including those related to AI chips
  • Design and implement functional software models to simulate SoC uncore logic and enable FW testing against the model
  • Design and implement low-latency and high throughput embedded SW to manage HW resources
  • Work with adjacent software and hardware teams to implement requirements, debug issues and shape future generations of the hardware
  • Collaborate with vendors to integrate their technologies within our systems
  • Bring up and debug firmware/driver on new platforms
  • Come up with processes and debug issues raised in the field
  • Set up monitoring, integration testing and diagnostics tools.

Requirements

  • 5+ years of experience working in embedded SW space
  • Ability to thrive in ambiguity and learn new technologies
  • Strong programming skills in C/C++ and/or Rust
  • Experience developing high throughput, low latency and multi-threaded code
  • Experience working with real time operating systems (RTOS)
  • Experience developing hardware drivers and working with hardware
  • Experience with HW/SW co-design
  • Knowledge of common embedded protocols, e.g. UART, I2C, SPI, etc.

Nice to have

  • Knowledge of microprocessor and common ARM architectures (e.g. AMBA) is a plus
  • Knowledge of PCIe, ethernet and other high BW communication protocols is a plus
  • Experience with GPUs or other compute hardware is a plus
  • Experience deploying large compute clusters is a plus.

What we offer

  • Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
  • Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
  • 401(k) retirement plan with employer match
  • Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)
  • Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
  • 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)
  • Mental health and wellness support
  • Employer-paid basic life and disability coverage
  • Annual learning and development stipend to fuel your professional growth
  • Daily meals in our offices, and meal delivery credits as eligible
  • Relocation support for eligible employees
  • Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided
  • Offers Equity
  • Performance-related bonus(es) for eligible employees.

Looking for more opportunities?

Search for other job offers that match your skills and interests.

Similar Jobs for

ASIC Firmware Engineer, Modeling

8 matching positions

Silicon Validation Firmware Engineer

Meta’s Silicon Engineers are at the forefront of innovation, driving the design ...
Location
Location
Taiwan , Taipei
Salary
Salary:
Not provided
meta.com Logo
Meta
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of experience in silicon design, development, and validation, including experience with ASICs and SoCs
  • Experience with EDA tools and scripting languages used to build tools and flows for complex emulation environments
  • Understanding of digital logic design, RTL development, and FPGA prototyping
  • Demonstrated problem-solving skills
Job Responsibility
Job Responsibility
  • Design, develop, and validate complex silicon systems, including ASICs and SoCs
  • Collaborate with cross-functional teams to ensure the delivery of high-quality silicon solutions
  • Develop and execute comprehensive test plans to ensure model accuracy and support pre-silicon validation efforts
  • Lead the development and adoption of best-in-class methodologies to accelerate hardware verification and software development
  • Bring up and debug interfaces such as PCIe, DDR, etc
  • Partner with vendors to troubleshoot issues, deploy new capabilities, and drive ongoing improvements
Read More
Arrow Right

Silicon Validation Firmware Engineer

Meta’s Silicon Engineers are at the forefront of innovation, driving the design ...
Location
Location
Taiwan , Taipei
Salary
Salary:
Not provided
meta.com Logo
Meta
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 2+ years of experience in silicon design, development, and validation, including experience with ASICs and SoCs
  • Experience with EDA tools and scripting languages used to build tools and flows for complex emulation environments
  • Understanding of digital logic design, RTL development, and FPGA prototyping
  • Demonstrated problem-solving skills
Job Responsibility
Job Responsibility
  • Design, develop, and validate complex silicon systems, including ASICs and SoCs
  • Collaborate with cross-functional teams to ensure the delivery of high-quality silicon solutions
  • Develop and execute comprehensive test plans to ensure model accuracy and support pre-silicon validation efforts
  • Lead the development and adoption of best-in-class methodologies to accelerate hardware verification and software development
  • Bring up and debug interfaces such as PCIe, DDR, etc
  • Partner with vendors to troubleshoot issues, deploy new capabilities, and drive ongoing improvements
Read More
Arrow Right

Networking Operating System Firmware Engineer

We’re seeking a Networking Operating System Firmware Engineer to help bootstrap ...
Location
Location
United States , San Francisco
Salary
Salary:
266000.00 - 445000.00 USD / Year
openai.com Logo
OpenAI
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Proven experience working with SONiC or comparable NOS stacks (FBOSS, Cumulus Linux, Arista EOS, Junos PFE-level integration, etc.)
  • Experience with updating OpenConfig gNMI interfaces and YANG data models
  • Strong background in Linux kernel, network device drivers, and low-level OS internals
  • Experience integrating Broadcom / Marvell / NVIDIA / Intel ASIC SDKs and SAI implementations
  • Proficiency in C, C++ and Python
  • Deep understanding of L2/L3 forwarding, ECMP, RoCE, BGP, QoS, PFC, buffer tuning, and telemetry
  • Hands-on experience with hardware platform bring-up and board-level debugging
  • Familiarity with CI/CD pipelines, distributed config/state management, and large-scale automation
  • Strong cross-functional problem solving in high-performance, distributed environments
  • Ability to lead teams to deliver a project end to end
Job Responsibility
Job Responsibility
  • Design, develop, and maintain custom SONiC NOS images for large-scale bleeding-edge AI fabrics
  • Integrate and configure Linux kernel components, device drivers, switch ASIC SDKs, and SAI layers
  • Bring up new switch platforms (thermal/fan control, power monitoring, transceiver management, watchdogs, OSFP CMIS, LEDs, CPLDs, etc.)
  • Extend and customize SONiC services for routing, telemetry, control-plane state, and distributed automation
  • Work with hardware teams to validate ASIC configurations, link bring-up, SerDes tuning, buffer profiles, and performance baselines
  • Evaluate switch silicon SDK releases, track vendor deliverables, and define platform requirements with vendors and ASIC partners
  • Debug complex issues spanning kernel, platform drivers, SONiC dockers, routing agents, orchestration services, hardware signals, and network topology
  • Integrate switches into fleet-wide monitoring, remote diagnostics, telemetry pipelines, and automated lifecycle workflows
  • Develop robust CI/build pipelines for reproducible NOS builds and controlled rollout across the fleet
  • Support factory bring-up and qualification all the way through mass deployment
What we offer
What we offer
  • Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
  • Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
  • 401(k) retirement plan with employer match
  • Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)
  • Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
  • 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)
  • Mental health and wellness support
  • Employer-paid basic life and disability coverage
  • Annual learning and development stipend to fuel your professional growth
  • Daily meals in our offices, and meal delivery credits as eligible
  • Fulltime
Read More
Arrow Right

Silicon Validation Firmware Engineer

Meta’s Silicon Engineers are at the forefront of innovation, driving the design ...
Location
Location
United States , Sunnyvale
Salary
Salary:
146000.00 - 209000.00 USD / Year
meta.com Logo
Meta
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of experience in silicon design, development, and validation, including experience with ASICs and SoCs
  • Experience with EDA tools and scripting languages used to build tools and flows for complex emulation environments
  • Understanding of digital logic design, RTL development, and FPGA prototyping
  • Demonstrated problem-solving skills
Job Responsibility
Job Responsibility
  • Design, develop, and validate complex silicon systems, including ASICs and SoCs
  • Collaborate with cross-functional teams to ensure the delivery of high-quality silicon solutions
  • Develop and execute comprehensive test plans to ensure model accuracy and support pre-silicon validation efforts
  • Lead the development and adoption of best-in-class methodologies to accelerate hardware verification and software development
  • Bring up and debug interfaces such as PCIe, DDR, etc
  • Partner with vendors to troubleshoot issues, deploy new capabilities, and drive ongoing improvements
What we offer
What we offer
  • bonus
  • equity
  • benefits
Read More
Arrow Right

Firmware Engineer

Etched is building the world’s first AI inference system purpose-built for trans...
Location
Location
Taiwan , Taipei
Salary
Salary:
Not provided
etched.com Logo
Etched
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's degree or equivalent practical experience
  • 3 years of experience in software development, and with data structures/algorithms
  • 3 years of experience developing and testing software on launching products
  • 3 years of experience with firmware design, implementation, and troubleshooting
  • 3 years of experience with embedded architectures, IO technologies (I2C, SPI, PCIe, DRAM etc.), as well as concepts like scalability, fault tolerance, and consistency
Job Responsibility
Job Responsibility
  • Co-Develop cutting-edge software optimized across hardware and software driving the full potential of very large transformer models
  • Solve challenging problems across the full stack, from low-level drivers and APIs to high-level applications and frameworks
  • Contribute to the development of AI solutions that will revolutionize industries like natural language processing, chain of reasoning automation, generative media
What we offer
What we offer
  • Competitive compensation packages including generous equity packages
  • Comprehensive insurance coverage and other top-of-market benefits
  • Fulltime
Read More
Arrow Right

DFT Engineer

DFT engineer will lead strong engineering team on Scan, MBIST, iJTAG test develo...
Location
Location
Singapore , Singapore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Experience DFT engineering experience through DFT pre and post silicon cycles
  • Experience in creating and implementing complex chip-level DFT architecture
  • Experience in DFT implementation including Scan and Scan Compression at IP and SoC level
  • Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression
  • Strong MBIST knowledge
  • Knowledge of Tessent Streaming Scan Network SSN and hand-on experience is a big plus
  • Proficient in logic design using Verilog and experience in synthesis and STA
  • Experience in developing test benches and simulation in RTL/GATE/SDF environments
  • Knowledge of FPGA synthesis and design flow is a plus
  • Experience with post-silicon debug and bench equipment (e.g., oscilloscope and logic analyser)
Job Responsibility
Job Responsibility
  • Manage DFT engineers resolving technical challenges and meeting product schedule
  • The role is in AMD global quality and operation organization driving best manufacturing test solution through pre and post silicon activities
  • Work closely with design teams and make sure DFT structures are correctly implemented
  • Responsible for developing, implementing and verifying DFT schemes on hard-IPs in AMD ASIC and FPGA products
  • Responsible for developing and implementing techniques to test digital logic, using Scan Compression, Stuck-at, Transition and Path-Delay fault models
  • Responsible for testing other parts of the design, including memory, mixed-signal, I/Os, custom LBISTs & MBISTs, IEEE1149.1 JTAG and IEEE1687 IJTAG
  • Responsible to develop Firmware driven cost-effective test strategies/methodologies with built-in diagnosis capability to enable efficient debugging and fault isolation on bench/ATE
  • Collaborate closely with the New Product Introduction and Test/Product teams to ensure timely delivery of robust test patterns, and manage debugging of pattern issues on bench/ATE to root cause the problem
  • Assist in Diagnosis and Yield enhancement through product lifecycle
  • Develop an adaptive and cohesive team to take up any challenging tasks entrusted by management
  • Fulltime
Read More
Arrow Right

Principal Technical Program Manager (Quantum Hardware and Firmware Systems)

Microsoft Quantum team is dedicated to developing the first scalable, fault-tole...
Location
Location
United States , Redmond
Salary
Salary:
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's Degree AND 6+ years experience in quantum information, physics, materials science, electrical engineering, hardware systems, engineering, or related technical fields OR equivalent experience
  • 3+ years of experience managing cross-functional and/or cross-team projects.
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings:Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
  • Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide proof of citizenship, U.S. permanent residency, or other protected status (e.g., under 8 U.S.C. § 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
  • Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation).
  • Apply AI to accelerate engineering and lab workflows. Design and build AI agents/copilots that assist with experiment setup, log triage, measurement report generation, protocol templating, and knowledge retrieval (e.g., instrument manuals, design docs).
  • Evaluate agentic solutions with measurable metrics and humanintheloop safeguards following Microsoft Responsible AI requirements for generative AI.
  • 10+ years of experience owning and managing multi-year, highly complex hardware and firmware product portfolios involving deep-tech or first-of-a-kind technologies, including board bring-up, System-on-Chip (SoC) bring-up, BIOS and driver development, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), quantum systems, advanced chip packaging, cryoelectronics, or other high-reliability hardware.
  • Experience managing firmware and hardware product development across the full lifecycle, including R&D, system integration, hardware-software integration, new-technology introduction, and technology transfer from R&D into scaled engineering and manufacturing, including hardware quality systems and development or auditing of test and validation protocols.
  • Experience with hands-on firmware, low-level systems, or advanced hardware R&D, including BIOS, drivers, embedded systems, quantum device development, quantum error correction, measurement/control systems, or similar advanced hardware domains.
Job Responsibility
Job Responsibility
  • Drive Program Execution: Lead comprehensive program management for pivotal quantum hardware initiatives. Oversee all phases, including concept development, engineering design, prototyping, validation, operational scaling, and ongoing delivery. Collaborate closely with system architects, research scientists, and hardware engineers to ensure successful outcomes for each project
  • Strategic Planning & Roadmapping: Work with program management leadership, engineering teams, and executive stakeholders to develop and maintain a clear roadmap for hardware platform advancement. Align technical milestones, allocate resources, manage schedules, and address risks to support Microsoft Quantum’s overarching long-term goals
  • Cross-Disciplinary Coordination: Facilitate collaboration and alignment among teams specializing in quantum device physics, cryoelectronics, materials science, hardware control, manufacturing, supply chain, integration, and cloud hardware operations. Ensure that integrated efforts result in reliable and scalable hardware solutions
  • Supplier & Partner Engagement: Manage relationships with external foundries, research laboratories, equipment vendors, and strategic partners. Foster cross-company collaboration, establish clear requirements, and ensure compliance with Microsoft’s standards for quality, safety, and data security
  • Risk Management: Identify, monitor, and mitigate technical, scheduling, and operational risks throughout program execution. Apply continuous improvement strategies and adjust programs in response to lessons learned and evolving technology trends
  • Agile Delivery: Oversee Agile program processes and ceremonies, promote transparency by conducting regular reviews and updates, and proactively remove obstacles to ensure timely achievement of critical deliverables
  • Customer Focus: Incorporate feedback from internal and pilot customers—including researchers, manufacturing partners, and Azure Quantum platform teams—to guide improvements in hardware and processes
  • Executive Communication: Develop concise, data-driven reports and executive updates that communicate program status, milestones, risks, dependencies, and impact, upholding Microsoft’s high standards for stakeholder engagement and reporting
  • Embody our culture and values
  • Fulltime
Read More
Arrow Right

Software Engineer: Silicon One - (C++/Networking Protocols) - 4+ Years

We are thrilled to announce an exciting opportunity joining Silicon One as a C++...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
Cisco
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • B.E or higher degree in Computer Science or a related field, from one of the top universities, with excellence
  • Strong background in C++
  • 5+ years of experience in Software Development, 3+ years of experience in C++ or Embedded Development
  • Familiar with Networking technologies and concepts
  • Excellent communication and strategic planning skills, while being self-motivated with a focus on execution.
Job Responsibility
Job Responsibility
  • You'll develop core software technologies at the heart of tomorrow's leading infrastructure solutions, tackling the entire range of challenges from user-facing API-s, through high-level algorithms, all the way down to firmware
  • Craft and develop software driving the world's most complex infrastructures
  • Gain intimate knowledge of world-class silicon and programming models
  • Work with architecture and design teams to define the next generation of ASIC products being developed
  • You'll be joining Cisco Silicon One Bangalore team which is the core center of Cisco’s SW and ASIC design
  • You'll be part of the group driving our groundbreaking next-generation network devices - Cisco Silicon One
  • Our unique team works in a startup atmosphere inside a stable and leading corporate and develops the full software stack enabling the Silicon One ASICs
  • Our R&D center is outstanding - hosting all silicon HW and SW development teams inside one site
  • We are transforming the industry and building a new AI/ML Networks, as well as providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products
  • Our devices are crafted to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms
  • Fulltime
Read More
Arrow Right