ASIC Engineer Job at Meta (Austin)

Staff Engineer - ASIC Development Engineering (DFT)

We are seeking a highly skilled Staff Engineer specializing in ASIC Development ...

Location

India , Bangalore

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Master's degree in Electrical Engineering, Computer Engineering, or a related field
7+ years of experience in ASIC development with a strong focus on DFT
Advanced knowledge of ASIC design and development processes
Expertise in Design for Testability (DFT) methodologies and techniques
Strong programming skills in languages such as Verilog, VHDL, and C++
Proficiency in using EDA tools for ASIC design, verification, and testing
In-depth understanding of semiconductor manufacturing processes
Experience with advanced DFT techniques, including BIST and ATPG
Knowledge of low-power design techniques
Familiarity with industry standards such as IEEE 1149.1 and IEEE 1500

Job Responsibility

Lead the development and implementation of DFT architectures for complex ASIC designs
Collaborate with cross-functional teams to integrate DFT solutions into the overall ASIC design flow
Develop and optimize test patterns using Automatic Test Pattern Generation (ATPG) tools
Implement Built-In Self-Test (BIST) solutions for various ASIC components
Analyze and improve test coverage, fault coverage, and test time for ASIC designs
Troubleshoot and debug DFT-related issues during the design and post-silicon phases
Stay current with industry trends and emerging DFT technologies
Mentor junior engineers and contribute to the development of best practices and methodologies
Participate in design reviews and provide technical guidance to ensure DFT requirements are met
Collaborate with external partners and vendors to evaluate and integrate new DFT tools and technologies

Fulltime

Staff Engineer, ASIC Development Engineering

Are you ready to push the boundaries of what's possible in technology? Join the ...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 5-8 years of experience
Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog
Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must
Proficiency in scripting languages (e.g., Python, TCL) for automation
Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
Strong problem-solving skills and the ability to thrive in a dynamic environment
Excellent communication and teamwork abilities

Job Responsibility

Innovate and develop RTL code for complex ASICs
Contribute in SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers
Ensure robust design methodologies including Lint, CDC, RDC, CLP and FC-Elab
Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process
Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution
Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution
Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design

Fulltime

Staff Engineer, ASIC Development Engineering

Sandisk understands how people and businesses consume data and we relentlessly i...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical/Electronic Engineering or a related field
4-8 years of experience in digital design, with a strong focus on RTL design and integration for complex SoCs
Expert-level proficiency in Verilog/SystemVerilog
Deep understanding of AMBA protocols (AXI/AHB/APB), interconnects, and peripherals
Experience in ASIC verification, Expertise in System Verilog and UVM, Verilog
Experience in IP level verification, testbench architecture development, Testbench component developments
Expertise in coverage closer, code coverage, functional coverage
Experience in Gate level simulations
Knowledge on serial protocols UFS, PCIe, USB, MIPI or any other serial protocol
Knowledge on memory protocols - SD, eMMC, Flash etc

Job Responsibility

Define verification plan, create testbenches, testcases, gate level simulations etc independently

Fulltime

Principal Engineer, ASIC Development Engineering (RTL Design)

We are seeking a highly skilled and experienced Principal Engineer to join our A...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BE or Master's in Electronics or Electrical Engineering, Computer Engineering, or a related field
8+ years of experience in ASIC development, with a proven track record of leading complex project
Hands on in IP / blocks / subsystem complex design in verilog / sysverilog
Strong digital design development and execution skills , solving bugs
Experience in grooming team of 1-4 engineers, interacting with many team
Deep expirience in debug , solving problem, see the architecture view, proposing solutions.
Hands-on experience with industry-standard EDA tools and design flows
Deep knowledge on PCIe, axi , DMA, AHB interfaces
Expertise in high-performance and low-power design techniques
Excellent communication skills, both verbal and written, with the ability to articulate complex technical concepts clearly

Job Responsibility

Design and implements IPs and subsystems
Dealing the best of class IPs for all SanDisk products

Fulltime

Senior Manager, ASIC Engineering

Manage design & verification team for large, complex high-speed ASICs for HPE's ...

Location

United States , San Jose

Salary:

148000.00 - 340500.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

BS/MS in Electrical Engineering or equivalent field
Minimum of 10+ years of ASIC experience
Prior engineering management experience
Strong Verilog, SystemC or C/C++, Perl/shell scripts or Vera programming skills
Proven leadership and communication skills
Networking experience is highly desirable
Track record of successfully managed/lead multiple ASIC's from start to finish
Ability to hire, retain and develop high performance teams

Job Responsibility

Manage design & verification team for large, complex high-speed ASICs for HPE's next generation of networking products
Technically lead a team of engineers to successfully deliver chip from specification to tapeout
Create and maintain schedule
Work closely with logic designers, software developers
Mentor junior engineers with the verification flow, strategy

What we offer

Health & Wellbeing benefits
Personal & Professional Development programs
Unconditional Inclusion environment
Comprehensive benefits suite supporting physical, financial and emotional wellbeing

Fulltime

Senior ASIC verification Engineer

We are looking for a new ASIC Verification Engineer to become part of the future...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
6-10 years of experience in VLSI design, verification, or implementation
Expert level proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
Expert level analytical and problem solving skills
Expert level knowledge of designing VLSI components, integrated circuitry, architectures and algorithms into VLSI solutions
Expert level knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
Experience in executive written and verbal communication skills
mastery in English and local language
Subject matter expertise or discipline leadership as evidenced through patents/publications in the field of VSLI or Electronic/hardware component designs and tools

Job Responsibility

Provide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing
Reviews and evaluates designs and project activities for compliance with VLSI technology and development guidelines and standards
provides tangible feedback to improve product quality
Provides VLSI-specific and technical expertise along with the overall architecture design and platform leadership to cross-organization projects, programs, and activities
Provides leadership of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence
Participates in and provides input on process for selection of future technical leaders
Drives VLSI innovation and integration of new technologies into projects and activities in the design organization

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

ASIC Verification Engineer II

We are looking for a new ASIC Verification Engineer to become part of the future...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
0-4 years of experience in VLSI design, verification or implementation
Experience or understanding of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
Ability to apply analytical and problem solving skills
Hands-on experience in designing VLSI components, integrated circuitry, architectures and developing algorithms
Knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
Coursework in VLSI design or VLSI concepts
Good written and verbal communication skills
mastery in English and local language

Job Responsibility

Verifies portions of computer/server architecture and algorithms based on established VLSI engineering principles
Collaborates and communicates with management regarding design status, project progress, and issue resolution
Verifies, simulates, and tests VLSI circuits
Ensures the VLSI designs meet quality, schedule, and cost goals for prototype or production solutions
Participates as a member of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
Provides guidance and mentoring to less experienced staff members

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

ASIC Engineer

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...

Location

India , Bangalore

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

3+ years of ASIC design experience
Strong Verilog RTL coding skills
Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable
Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus
Knowledge of high performance memory subsystems
Knowledge of multi-domain clock synchronization and high-speed serial interfaces
Strong problem solving and ASIC debugging skills
Excellent written and verbal communications skills
MSEE or BSEE is required

Job Responsibility

Define and architect high-performance blocks for the latest, most advanced networking ASICs
Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power
Collaborate with the verification team in the development of the test plan and assist in debugging test failures
Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

ASIC Engineer

Meta

Location:
United States , Austin

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
March 22, 2026

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