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Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.
Job Responsibility:
Define and architect high-performance blocks for the latest, most advanced networking ASICs
Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power
Collaborate with the verification team in the development of the test plan and assist in debugging test failures
Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes
Requirements:
3+ years of ASIC design experience
Strong Verilog RTL coding skills
Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable
Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus
Knowledge of high performance memory subsystems
Knowledge of multi-domain clock synchronization and high-speed serial interfaces
Strong problem solving and ASIC debugging skills
Excellent written and verbal communications skills
MSEE or BSEE is required
Nice to have:
Experience designing ASICs for networking protocols (Ethernet, FCoE)
Knowledge of high performance memory subsystems
Knowledge of multi-domain clock synchronization and high-speed serial interfaces
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